JAJSLS3 December   2022 OPT4048

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 概要 (続き)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Spectral Matching to CIE
      2. 8.3.2 Automatic Full-Scale Range Setting
      3. 8.3.3 Output Register CRC and Counter
        1. 8.3.3.1 Output Sample Counter
        2. 8.3.3.2 Output CRC
        3. 8.3.3.3 Threshold Detection
      4. 8.3.4 Device Functional Modes
        1. 8.3.4.1 Modes of Operation
        2. 8.3.4.2 Interrupt Modes of Operation
        3. 8.3.4.3 Light Range Selection
        4. 8.3.4.4 Selecting Conversion Time
        5. 8.3.4.5 Light and Color Measurement
        6. 8.3.4.6 Light Resolution
        7. 8.3.4.7 Programming
          1. 8.3.4.7.1 I2C Bus Overview
            1. 8.3.4.7.1.1 Serial Bus Address
            2. 8.3.4.7.1.2 Serial Interface
          2. 8.3.4.7.2 Writing and Reading
            1. 8.3.4.7.2.1 High-Speed I2C Mode
            2. 8.3.4.7.2.2 Burst Read Mode
            3. 8.3.4.7.2.3 General-Call Reset Command
            4. 8.3.4.7.2.4 SMBus Alert Response
    4. 8.4 Register Maps
      1. 8.4.1 ALL Register Map
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Electrical Interface
      2. 9.2.2 Design Requirements
        1. 9.2.2.1 Optical Interface
      3. 9.2.3 Detailed Design Procedure
        1. 9.2.3.1 Optomechanical Design
      4. 9.2.4 Application Curves
    3. 9.3 Do's and Don'ts
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
      3. 9.5.3 Soldering and Handling Recommendations
  10. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 ドキュメントの更新通知を受け取る方法
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集
  11. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.3.3.2 Output CRC

CRC_CHx registers consists of Cyclic Redundancy Checker bits part of the output registers calculated within the OPT4048 device and updated on every measurement. This feature helps in detecting communication related bit errors during the output readout from the device. The calculation method for the CRC bits is shown in the Figure 8-12, which can be independently verified in the controller or host firmware/software to validate if communication between the controller and the device was successful without bit errors during transmission.