SBAS451B October   2008  – August  2015 PCM1789

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics: Digital Input/Output
    6. 6.6  Electrical Characteristics: DAC
    7. 6.7  Electrical Characteristics: Power-Supply Requirements
    8. 6.8  System Clock Timing Requirements
    9. 6.9  Audio Interface Timing Requirements
    10. 6.10 Three-Wire Timing Requirements
    11. 6.11 SCL and SDA Timing Requirements
    12. 6.12 Typical Characteristics
      1. 6.12.1 Digital Filter
      2. 6.12.2 Digital De-Emphasis Filter
      3. 6.12.3 Dynamic Performance
      4. 6.12.4 Output Spectrum
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Analog Outputs
      2. 7.3.2  Voltage Reference VCOM
      3. 7.3.3  System Clock Input
      4. 7.3.4  Reset Operation
      5. 7.3.5  ZERO Flag
      6. 7.3.6  AMUTE Control
      7. 7.3.7  Three-Wire (SPI) Serial Control
      8. 7.3.8  Control Data Word Format
      9. 7.3.9  Register Write Operation
      10. 7.3.10 Timing Requirements
      11. 7.3.11 Two-wire (I2C) Serial Control
      12. 7.3.12 Packet Protocol
      13. 7.3.13 Write Operation
      14. 7.3.14 Read Operation
    4. 7.4 Device Functional Modes
      1. 7.4.1 Sampling Mode
      2. 7.4.2 Audio Serial Port Operation
      3. 7.4.3 Audio Data Interface Formats and Timing
      4. 7.4.4 Audio Interface Timing
      5. 7.4.5 Synchronization with the Digital Audio System
      6. 7.4.6 MODE Control
      7. 7.4.7 Parallel Hardware Control
    5. 7.5 Register Maps
      1. 7.5.1 Control Register Definitions (Software Mode Only)
      2. 7.5.2 Register Definitions
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Connection Diagrams
      2. 8.1.2 Power Supply and Grounding
      3. 8.1.3 Low-Pass Filter and Differential-to-Single-Ended Converter For DAC Outputs
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Hardware Control Method
        2. 8.2.2.2 Audio Input
        3. 8.2.2.3 Audio Output
        4. 8.2.2.4 Master Clock
    3. 8.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

8.1.1 Connection Diagrams

A basic connection diagram is shown in Figure 39, with the necessary power-supply bypassing and decoupling components. Texas Instruments’ PLL170X is used to generate the system clock input at SCKI, as well as to generate the clock for the audio signal processor. The use of series resistors (22 Ω to 100 Ω) are recommended for SCKI, LRCK, BCK, and DIN for electromagnetic interference (EMI) reduction.

8.1.2 Power Supply and Grounding

The PCM1789 requires +5 V for the analog supply and +3.3 V for the digital supply. The +5-V supply is used to power the DAC analog and output filter circuitry, and the +3.3-V supply is used to power the digital filter and serial interface circuitry. For best performance, it is recommended to use a linear regulator (such as the REG101-5/33, REG102-5/33, or REG103-5/33) with the +5-V and +3.3-V supplies.

Five capacitors are required for supply bypassing, as shown in Figure 39. These capacitors should be located as close as possible to the PCM1789 package. The 10-μF capacitors are aluminum electrolytic, while the three 1-μF capacitors are ceramic.

8.1.3 Low-Pass Filter and Differential-to-Single-Ended Converter For DAC Outputs

ΔΣ DACs use noise-shaping techniques to improve in-band signal-to-noise ratio (SNR) performance at the expense of generating increased out-of-band noise above the Nyquist frequency, or fS/2. The out-of-band noise must be low-pass filtered in order to provide optimal converter performance. This filtering is accomplished by a combination of on-chip and external low-pass filters.

Figure 37 and Figure 38 show the recommended external differential-to-single-ended converter with low-pass active filter circuits for ac-coupled and dc-coupled applications. These circuits are second-order Butterworth filters using a multiple feedback (MFB) circuit arrangement that reduces sensitivity to passive component variations over frequency and temperature. For more information regarding MFB active filter designs, please refer to Applications Bulletin SBAA055, Dynamic Performance Testing of Digital Audio D/A Converters, available from the TI web site (www.ti.com) or your local Texas Instruments' sales office.

Because the overall system performance is defined by the quality of the DACs and the associated analog output circuitry, high-quality audio op amps are recommended for the active filters. Texas Instruments’ OPA2134, OPA2353, and NE5532A dual op amps are shown in Figure 37 and Figure 38, and are recommended for use with the PCM1789.

PCM1789 ai_post_lpf_ac_bas451.gif
NOTE: Amplifier is an NE5532A x 1/2 or OPA2134 x1/2; R1 = 7.5 kΩ; R2 = 5.6 kΩ; R3 = 360 Ω; C1 = 3300 pF; C2 = 680 pF; Gain = 0.747;
f–3 dB = 53 kHz.
Figure 37. AC-Coupled, Post-LPF and Differential to Single-Ended Buffer
PCM1789 ai_post_lpf_dc_bas451.gif
NOTE: Amplifier is an NE5532A x 1/2 or OPA2134 x1/2; R1 = 15 kΩ; R2 = 11 kΩ; R3 = 820 Ω; C1 = 1500 pF; C2 = 330 pF; Gain = 0.733;
f–3 dB = 54 kHz.
Figure 38. DC-Coupled, Post-LPF and Differential to Single-Ended Buffer

8.2 Typical Application

PCM1789 ai_basic_bas451.gif
NOTE: C1 through C3 are 1-μF ceramic capacitors. C4 through C6 are 10-μF electrolytic capacitors. R1 through R4 are 22-Ω to 100-Ω resistors. R5 is a resistor appropriate for pull-up. R6 is a 220-kΩ resistor, ±5%. An appropriate resistor is required for pull-up, if ZERO2/AMUTEO pin is used as AMUTEO.
Figure 39. Basic Connection Diagram

8.2.1 Design Requirements

  • Control: Hardware, I2C, or SPI
  • Audio Input: PCM Serial Data, TDM, or DSP
  • Audio Output: (1.6 × VCC1) Vpp Analog Audio Biased to (0.5 × VCC1) V
  • Master Clock: PLL170X IC

8.2.2 Detailed Design Procedure

8.2.2.1 Hardware Control Method

There are 3 ways to control the PCM1789, hardware control, SPI, or I2C. Hardware control will provide a limited access to control features available in the PCM1789 but can be implemented with pull up and pull downs, or with GPIO of a microcontroller. Control via SPI or I2C will provide access to all control registers and features but will require a digital device that can implement SPI or I2C.

8.2.2.2 Audio Input

For Audio Input there are 3 options, PCM serial data, TDM, or DSP. All three will support the same quality of audio data, but having these 3 options to match the audio sources available outputs allows for greater flexibility. This selection is made by configuring the MODE pin which is detailed in Table 9 and shown in .

8.2.2.3 Audio Output

The output of the PCM1789 will produce a differential (1.6 × VCC1) Vpp signal at full scale into a 5-kΩ load, that should be filtered before being sent to an amplifier. Outputs VOUT1 through VOUT8 will be biased at (0.5 × VCC1) V.

8.2.2.4 Master Clock

The master clock can come from wither a dedicated IC such as the PLL170X series, a crystal or the audio source IC. What is important is that the audio source and the PCM1789 are driven from the same source so that the audio clocks will be synchronous.

8.3 Application Curve

PCM1789 tc_fresp_single_bas451.gifFigure 40. Frequency Response (Single Rate)