JAJSNF6A
April 2022 – September 2022
PCM1822-Q1
PRODUCTION DATA
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Device Comparison Table
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
Thermal Information
7.4
Electrical Characteristics
7.5
Timing Requirements: TDM, I2S or LJ Interface
7.6
Switching Characteristics: TDM, I2S or LJ Interface
7.7
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Hardware Control
8.3.2
Audio Serial Interfaces
8.3.2.1
Time Division Multiplexed Audio (TDM) Interface
8.3.2.2
Inter IC Sound (I2S) Interface
8.3.3
Phase-Locked Loop (PLL) and Clock Generation
8.3.4
Input Channel Configurations
8.3.5
Reference Voltage
8.3.6
Signal-Chain Processing
8.3.6.1
Digital High-Pass Filter
8.3.6.2
Configurable Digital Decimation Filters
8.3.6.2.1
Linear Phase Filters
8.3.6.2.1.1
Sampling Rate: 8 kHz or 7.35 kHz
8.3.6.2.1.2
Sampling Rate: 16 kHz or 14.7 kHz
8.3.6.2.1.3
Sampling Rate: 24 kHz or 22.05 kHz
8.3.6.2.1.4
Sampling Rate: 32 kHz or 29.4 kHz
8.3.6.2.1.5
Sampling Rate: 48 kHz or 44.1 kHz
8.3.6.2.1.6
Sampling Rate: 96 kHz or 88.2 kHz
8.3.6.2.1.7
Sampling Rate: 192 kHz or 176.4 kHz
8.3.6.2.2
Low-Latency Filters
8.3.6.2.2.1
Sampling Rate: 16 kHz or 14.7 kHz
8.3.6.2.2.2
Sampling Rate: 24 kHz or 22.05 kHz
8.3.6.2.2.3
Sampling Rate: 32 kHz or 29.4 kHz
8.3.6.2.2.4
Sampling Rate: 48 kHz or 44.1 kHz
8.3.6.2.2.5
Sampling Rate: 96 kHz or 88.2 kHz
8.3.7
Dynamic Range Enhancer (DRE)
8.4
Device Functional Modes
8.4.1
Active Mode
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curves
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Receiving Notification of Documentation Updates
12.2
サポート・リソース
12.3
Trademarks
12.4
Electrostatic Discharge Caution
12.5
Glossary
13
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
RTE|20
MPQF596
サーマルパッド・メカニカル・データ
発注情報
jajsnf6a_oa
jajsnf6a_pm
8.2
Functional Block Diagram