JAJSKS9 December 2020 PCM6480-Q1
PRODUCTION DATA
The PCM6480-Q1 is a scalable device that consists of high-performance, low-power, flexible, multichannel, audio analog-to-digital converters (ADCs) with extensive feature integration. This device is intended for automotive applications such as vehicle cabin active noise cancellation, hands-free in-vehicle communication, emergency call, and multimedia applications. The PCM6480-Q1 is a high performance audio converter that supports simultaneous sampling of up to a 4-channel analog microphone or a line input along with up to a 4-channel digital pulse density-modulation (PDM) microphone input. The high dynamic range of this device enables far-field audio recording with high fidelity. This device integrates a host of features that reduce cost, board space, and power consumption in space-constrained automotive sub-system designs. Package, performance, and device-compatible configuration registers make this device well suited for scalable system designs.
The PCM6480-Q1 consists of the following blocks:
Communication to the PCM6480-Q1 for configuring the control registers is supported using an I2C or SPI interface. The device supports a highly flexible audio serial interface [time-division multiplexing (TDM), I2S, or left-justified (LJ)] to transmit audio data seamlessly in the system across devices.
The device can support multiple devices by sharing the common I2C and TDM buses across devices. Moreover, the device includes a daisy-chain feature and a secondary audio serial output data pin. These features relax the shared TDM bus timing requirements and board design complexities when operating multiple devices for applications requiring high audio data bandwidth.
Table 8-1 lists the reference abbreviations used throughout this document to registers that control the device.
REFERENCE | ABBREVIATION | DESCRIPTION | EXAMPLE |
---|---|---|---|
Page y, register z, bit k | Py_Rz_Dk | Single data bit. The value of a single bit in a register. | Page 4, register 36, bit 0 = P4_R36_D0 |
Page y, register z, bits k-m | Py_Rz_D[k:m] | Range of data bits. A range of data bits (inclusive). | Page 4, register 36, bits 3-0 = P4_R36_D[3:0] |
Page y, register z | Py_Rz | One entire register. All eight bits in the register as a unit. | Page 4, register 36 = P4_R36 |
Page y, registers z-n | Py_Rz-Rn | Range of registers. A range of registers in the same page. | Page 4, registers 36, 37, 38 = P4_R36-R38 |