JAJSSL2 March 2024 PGA849
ADVANCE INFORMATION
PIN | TYPE | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
A0 | 4 | Input | Gain option pin 0 |
A1 | 5 | Input | Gain option pin 1 |
A2 | 1 | Input | Gain option pin 2 |
DA_IN+ | 9 | Input | Connection to output difference amplifier summing node |
DA_IN– | 12 | Input | Connection to output difference amplifier summing node |
DGND | 16 | Power | Ground reference for digital-logic and gain-setting pins |
IN– | 3 | Input | Negative (inverting) input |
IN+ | 2 | Input | Positive (noninverting) input |
LVDD | 7 | Power | Output-driver positive supply |
LVSS | 14 | Power | Output-driver negative supply |
NC | 8 | — | Do not connect |
NC | 13 | — | Do not connect |
OUT | 11 | Output | Output |
REF | 10 | Input | Reference input. This pin must be driven by a low-impedance source |
VS+ | 6 | Power | Input-stage positive supply |
VS– | 15 | Power | Input-stage negative supply |
Thermal Pad | Thermal pad | — | The thermal pad must be soldered to the printed-circuit board (PCB). Connect thermal pad to a plane or large copper pour that is either floating or electrically connected to VS–, even for applications that have low power dissipation. |