JAJSPR4B
April 2023 – September 2023
PGA855
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Device Comparison Table
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
機能ブロック図
8.3
Feature Description
8.3.1
Gain Control
8.3.2
Input Protection
8.3.3
Output Common-Mode Pin
8.3.4
Using the Fully Differential Output Amplifier to Shape Noise
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.1.1
Linear Operating Input Range
9.2
Typical Applications
9.2.1
ADS127L11 and ADS127L21, 24-Bit, Delta-Sigma ADC Driver Circuit
9.2.1.1
Design Requirements
9.2.1.2
Detailed Design Procedure
9.2.1.3
Application Curves
9.2.2
ADS8900B 20-Bit SAR ADC Driver Circuit
9.2.2.1
Design Requirements
9.2.2.2
Detailed Design Procedure
9.2.2.3
Application Curves
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.2
Layout Example
10
Device and Documentation Support
10.1
Device Support
10.1.1
Development Support
10.1.1.1
PSpice® for TI
10.2
Documentation Support
10.2.1
Related Documentation
10.3
ドキュメントの更新通知を受け取る方法
10.4
サポート・リソース
10.5
Trademarks
10.6
静電気放電に関する注意事項
10.7
用語集
11
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
RGT|16
MPQF119H
サーマルパッド・メカニカル・データ
RGT|16
QFND098S
発注情報
jajspr4b_oa
jajspr4b_pm
9.2.1.3
Application Curves
G = 1 V/V, f
IN
= 1 kHz, SNR = 109.6 dB, THD = –121.4 dB
Figure 9-7
Performance FFT Plots With ADS127L11, OSR = 64, Sinc4 Filter
G = 1 V/V, f
IN
= 1 kHz, SNR = 107.6 dB, THD = –121.4 dB
Figure 9-8
Performance FFT Plots With ADS127L11, OSR = 64, Wideband Filter