JAJSRL2A October   2023  – December 2023 RES11A-Q1

ADVMIX  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 AEC-Q200 Qualification Testing
    7. 5.7 Typical Characteristics
  7. Parameter Measurement Information
    1. 6.1 DC Measurement Configurations
    2. 6.2 AC Measurement Configurations
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Ratiometric Matching
      2. 7.3.2 Ratiometric Drift
      3. 7.3.3 Predictable Voltage Coefficient
      4. 7.3.4 Ultra-Low Noise
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Discrete Difference Amplifier
        1. 8.1.1.1 Difference-Amplifier Common-Mode Rejection Analysis
      2. 8.1.2 Discrete Instrumentation Amplifiers
        1. 8.1.2.1 Instrumentation Amplifier Common-Mode Rejection Analysis
      3. 8.1.3 Fully Differential Amplifier
    2. 8.2 Typical Application
      1. 8.2.1 Common-Mode Shifting Input Stage
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Examples
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 PSpice® for TI
        2. 9.1.1.2 TINA-TI™シミュレーション・ソフトウェア (無償ダウンロード)
        3. 9.1.1.3 TI のリファレンス・デザイン
        4. 9.1.1.4 フィルタ設計ツール
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 ドキュメントの更新通知を受け取る方法
    4. 9.4 サポート・リソース
    5. 9.5 Trademarks
    6. 9.6 静電気放電に関する注意事項
    7. 9.7 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information
    2. 11.2 Mechanical Data

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • DDF|8
サーマルパッド・メカニカル・データ
発注情報

Discrete Instrumentation Amplifiers

The RES11A-Q1 can be used to in conjunction with a dual-channel operational amplifier to implement a discrete instrumentation amplifier (INA). The ratiometric matching between the two resistor dividers improves CMRR performance for the circuit when compared to a similar implementation using unmatched discrete resistors, and results in better overtemperature and overaging gain drift characteristics. INAs are often used instead of difference amplifiers when high input impedance and low bias currents are needed, such as when measuring bridge sensors.

Discrete INAs are often configured as a differential-input differential-output circuit as shown in Figure 8-3. While not shown, if needed, use an additional discrete difference amplifier stage (requiring a second RES11A-Q1 and another op-amp channel) to convert the differential output voltage to a single-ended voltage (for example, when driving a single-ended ADC). This extra stage can also add an additional offset and provide additional gain, effectively mimicking the common three-amplifier INA architecture.

Equation 22. V OUT+ V OUT− = V IN+ V IN− × 1+ R G R I N
GUID-20230927-SS0I-T8KL-J6FM-SXGW3VXZ34D5-low.svg Figure 8-3 Differential-Input, Differential-Output Instrumentation Amplifier Using the RES11A-Q1

Less commonly, a discrete INA can be implemented as a differential-input, single-ended output circuit as shown in Figure 8-4. This topology maintains high input impedances, allows an offset to be applied, and gives a single-ended output without requiring a third amplifier channel. The offset must be driven by a low-impedance source, such as a reference buffer. When designing a discrete INA, carefully consider the output swing and input common-mode range limitations of the amplifiers used in the circuit design process.

Equation 23. V OUT = V IN+ V IN− × 1+ R G R I N + V REF
GUID-20230927-SS0I-XJNM-SN7Q-N5QLWXP4S8DP-low.svg Figure 8-4 Differential-Input, Single-Ended Output Instrumentation Amplifier Using the RES11A-Q1