JAJSRL2A October   2023  – December 2023 RES11A-Q1

ADVMIX  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 AEC-Q200 Qualification Testing
    7. 5.7 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 DC Measurement Configurations
    2. 6.2 AC Measurement Configurations
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Ratiometric Matching
      2. 7.3.2 Ratiometric Drift
      3. 7.3.3 Predictable Voltage Coefficient
      4. 7.3.4 Ultra-Low Noise
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Discrete Difference Amplifier
        1. 8.1.1.1 Difference-Amplifier Common-Mode Rejection Analysis
      2. 8.1.2 Discrete Instrumentation Amplifiers
        1. 8.1.2.1 Instrumentation Amplifier Common-Mode Rejection Analysis
      3. 8.1.3 Fully Differential Amplifier
    2. 8.2 Typical Application
      1. 8.2.1 Common-Mode Shifting Input Stage
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Examples
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 PSpice® for TI
        2. 9.1.1.2 TINA-TI™シミュレーション・ソフトウェア (無償ダウンロード)
        3. 9.1.1.3 TI のリファレンス・デザイン
        4. 9.1.1.4 フィルタ設計ツール
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 ドキュメントの更新通知を受け取る方法
    4. 9.4 サポート・リソース
    5. 9.5 Trademarks
    6. 9.6 静電気放電に関する注意事項
    7. 9.7 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information
    2. 11.2 Mechanical Data

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
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発注情報

6.2 AC Measurement Configurations

Figure 6-5 shows the circuit configuration used for capacitance measurements. For the RES11A-Q1, a 1‑MΩ RKNOWN resistance and 10‑pF CKNOWN capacitance are used. The circuit creates an impedance divider; the resulting gain-vs-frequency relationship is used to calculate the parasitic capacitance in parallel with the resistor under test (in this case, RIN1). Calibration with an empty socket is performed to account for board parasitics. The ac source is swept from 100 Hz to 50 MHz.

GUID-20231201-SS0I-XCQG-MBZV-CHRG1CHWJPXV-low.svg Figure 6-5 Capacitance Measurement Reference Schematic

Figure 6-6 shows the circuit configuration that is used for bandwidth measurements. The ac source is swept from 100 kHz to 500 MHz.

GUID-20231201-SS0I-FZ9K-TXWG-MTQQXWSRWS5B-low.svg Figure 6-6 Bandwidth Measurement Reference Schematic

Figure 6-7 shows the circuit configuration used for crosstalk measurements. The ac source is swept from 100 Hz to 100 MHz.

GUID-20231201-SS0I-8K6N-7GZK-GHK6DBZFZJXK-low.svg Figure 6-7 Crosstalk Measurement Reference Schematic