JAJSUE5A
April 2024 – July 2024
SN4599-Q1
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Source or Drain Current through Switch
5.6
Electrical Characteristics
5.7
Analog Channel Specifications
5.8
Switching Characteristics
5.9
Typical Characteristics
6
Parameter Measurement Information
6.1
On-Resistance
6.2
Off-Leakage Current
6.3
On-Leakage Current
6.4
Transition Time
6.5
Break-Before-Make
6.6
Charge Injection
6.7
Off Isolation
6.8
Crosstalk
6.9
Bandwidth
7
Detailed Description
7.1
Functional Block Diagram
7.2
Feature Description
7.2.1
Bidirectional Operation
7.2.2
Rail to Rail Operation
7.2.3
Fail-Safe Logic
7.3
Device Functional Modes
7.4
Truth Tables
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Switchable Operational Amplifier Gain Setting
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.1.3
Application Curve
8.2.2
Input Control for Power Amplifier
8.2.2.1
Design Requirements
8.2.2.2
Detailed Design Procedure
8.2.2.3
Application Curve
8.3
Power Supply Recommendations
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Documentation Support
9.1.1
Related Documentation
9.2
ドキュメントの更新通知を受け取る方法
9.3
サポート・リソース
9.4
Trademarks
9.5
静電気放電に関する注意事項
9.6
用語集
10
Revision History
11
Mechanical, Packaging, and Orderable Information
11.1
Tape and Reel Information
11.2
Mechanical Data
パッケージ・オプション
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
メカニカル・データ(パッケージ|ピン)
DBV|6
サーマルパッド・メカニカル・データ
発注情報
jajsue5a_oa
5
Specifications