JAJSOH1AC March   1993  – April 2022 SN54LVC14A , SN74LVC14A

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions: SN54LVC14A
    4. 6.4  Recommended Operating Conditions: SN74LVC14A
    5. 6.5  Thermal Information
    6. 6.6  Electrical Characteristics, SN54LVC14A
    7. 6.7  Electrical Characteristics, SN74LVC14A
    8. 6.8  Switching Characteristics, SN54LVC14A
    9. 6.9  Switching Characteristics, SN74LVC14A
    10. 6.10 Operating Characteristics
    11. 6.11 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Balanced High-Drive CMOS Push-Pull Outputs
      2. 8.3.2 CMOS Schmitt-Trigger Inputs
      3. 8.3.3 Clamp Diodes
      4. 8.3.4 Over-Voltage Tolerant Inputs
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Examples
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 サポート・リソース
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • J|14
  • FK|20
  • W|14
サーマルパッド・メカニカル・データ
発注情報

Electrical Characteristics, SN74LVC14A

over operating free-air temperature range (unless otherwise noted)
PARAMETERTEST CONDITIONSVCCSN74LVC14AUNIT
TA = 25°C–40 TO +85°C–40 TO +125°C
MINTYPMAXMINMAXMINMAX
VT+Positive-going
threshold
1.65 V0.41.30.41.30.41.3V
1.95 V0.61.50.61.50.61.5
2.3 V0.81.70.81.70.81.7
2.5 V0.81.70.81.70.81.7
2.7 V0.820.820.82
3 V0.920.920.92
3.6 V1.121.121.12
VT–Negative-going
threshold
1.65 V0.150.850.150.850.150.85V
1.95 V0.250.950.250.950.250.95
2.3 V0.41.20.41.20.41.2
2.5 V0.41.20.41.20.41.2
2.7 V0.41.40.41.40.41.4
3 V0.61.50.61.50.61.5
3.6 V0.81.70.81.70.81.7
ΔVTHysteresis
(VT+ – VT-)
1.65 V0.11.150.11.150.11.15V
1.95 V0.151.250.151.250.151.25
2.3 V0.251.30.251.30.251.3
2.5 V0.251.30.251.30.251.3
2.7 V0.31.10.31.10.31.1
3 V0.31.20.31.20.31.2
3.6 V0.31.20.31.20.31.2
VOHIOH = –100 μA1.65 V to 3.6 VVCC – 0.2VCC – 0.2VCC – 0.3V
IOH = –4 mA1.65 V1.291.21.05
IOH = –8 mA2.3 V1.91.71.65
IOH = –12 mA2.7 V2.22.22.05
3 V2.42.42.25
IOH = –24 mA3 V2.32.22
VOLIOL = 100 μA1.65 V to 3.6 V0.10.20.3V
IOL = 4 mA1.65 V0.240.450.6
IOL = 8 mA2.3 V0.30.70.75
IOL = 12 mA2.7 V0.40.40.6
IOL = 24 mA3 V0.550.550.8
IIVI = 5.5 V or GND3.6 V±1±5±20μA
ICCVI = VCC or GND, IO = 03.6 V11040μA
ΔICCOne input at
VCC – 0.6 V,
Other inputs at
VCC or GND
2.7 V to 3.6 V5005005000μA
CiVI = VCC or GND3.3 V5pF