JAJSG48Q July   1995  – September 2018 SN54LVCH245A , SN74LVCH245A

PRODUCTION DATA.  

1. 1 特長
2. 2 アプリケーション
3. 3 概要
   1.     Device Images
      1.      概略回路図
4. 4 改訂履歴
5. 5 Pin Configuration and Functions
   1.     Pin Functions
   2.     Pin Assignments: ZQN Package
   3.     Pin Assignments: ZXY Package
6. 6 Specifications
   1. 6.1  Absolute Maximum Ratings
   2. 6.2  ESD Ratings
   3. 6.3  Recommended Operating Conditions: SN74LVCH245A
   4. 6.4  Recommended Operating Conditions: SN54LVCH245A
   5. 6.5  Thermal Information
   6. 6.6  Electrical Characteristics: SN74LVCH245A
   7. 6.7  Electrical Characteristics: SN54LVCH245A
   8. 6.8  Switching Characteristics: SN74LVCH245A, –40°C TO 85°C
   9. 6.9  Switching Characteristics: SN74LVCH245A, –40°C TO 125°C
   10. 6.10 Switching Characteristics: SN54LVCH245A
   11. 6.11 Operating Characteristics
   12. 6.12 Typical Characteristics
7. 7 Parameter Measurement Information
8. 8 Detailed Description
   1. 8.1 Overview
   2. 8.2 Functional Block Diagram
   3. 8.3 Feature Description
      1. 8.3.1 Balanced High-Drive CMOS Push-Pull Outputs
      2. 8.3.2 Standard CMOS Inputs
      3. 8.3.3 Negative Clamping Diodes
      4. 8.3.4 Bus-Hold Data Inputs
      5. 8.3.5 Partial Power Down (Ioff)
      6. 8.3.6 Over-voltage Tolerant Inputs
      7. 8.3.7 Output Enable
   4. 8.4 Device Functional Modes
9. 9 Application and Implementation
   1. 9.1 Application Information
   2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
10. 10Power Supply Recommendations
11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
12. 12デバイスおよびドキュメントのサポート
    1. 12.1 関連リンク
    2. 12.2 商標
    3. 12.3 静電気放電に関する注意事項
    4. 12.4 Glossary
13. 13メカニカル、パッケージ、および注文情報