JAJSNL8B February 2022 – December 2023 SN54SLC8T245-SEP
PRODUCTION DATA
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
PIN | TYPE(1) | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
A1 | 3 | I/O | Input/output A1. Referenced to VCCA. |
A2 | 4 | I/O | Input/output A2. Referenced to VCCA. |
A3 | 5 | I/O | Input/output A3. Referenced to VCCA. |
A4 | 6 | I/O | Input/output A4. Referenced to VCCA. |
A5 | 7 | I/O | Input/output A5. Referenced to VCCA. |
A6 | 8 | I/O | Input/output A6. Referenced to VCCA. |
A7 | 9 | I/O | Input/output A7. Referenced to VCCA. |
A8 | 10 | I/O | Input/output A8. Referenced to VCCA. |
B1 | 21 | I/O | Input/output B1. Referenced to VCCB. |
B2 | 20 | I/O | Input/output B2. Referenced to VCCB. |
B3 | 19 | I/O | Input/output B3. Referenced to VCCB. |
B4 | 18 | I/O | Input/output B4. Referenced to VCCB. |
B5 | 17 | I/O | Input/output B5. Referenced to VCCB. |
B6 | 16 | I/O | Input/output B6. Referenced to VCCB. |
B7 | 15 | I/O | Input/output B7. Referenced to VCCB. |
B8 | 14 | I/O | Input/output B8. Referenced to VCCB. |
DIR1 | 2 | I | Direction-control signal 1. Referenced to VCCA. |
DIR2 | 11 | I | Direction-control signal 2. Referenced to VCCA. Tie to GND to maintain backward compatibility with SN74AVC8T245 device. |
GND | 12 | — | Ground |
13 | — | Ground | |
OE | 22 | I | Output Enable. Pull to GND to enable all outputs. Pull to VCCA to place all outputs in high-impedance mode. Referenced to VCCA. |
VCCA | 1 | — | A-port supply voltage. 0.65 V ≤ VCCA ≤ 3.6 V |
VCCB | 23 | — | B-port supply voltage. 0.65 V ≤ VCCB ≤ 3.6 V |
24 | — | B-port supply voltage. 0.65 V ≤ VCCB ≤ 3.6 V |