SLLS631E April   2007  – August 2015 SN65HVD1040

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Driver Electrical Characteristics
    6. 7.6  Receiver Electrical Characteristics
    7. 7.7  Device Switching Characteristics
    8. 7.8  Driver Switching Characteristics
    9. 7.9  Receiver Switching Characteristics
    10. 7.10 Dissipation Ratings
    11. 7.11 Supply Current
    12. 7.12 Split-Pin Characteristics
    13. 7.13 STB-Pin Characteristics
    14. 7.14 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Mode Control
        1. 9.3.1.1 High-Speed Mode
        2. 9.3.1.2 Low-Power Mode
      2. 9.3.2 Dominant State Time-Out
      3. 9.3.3 Thermal Shutdown
      4. 9.3.4 SPLIT
      5. 9.3.5 Operating Temperature Range
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
        1. 10.2.1.1 Bus Loading, Length, and Number of Nodes
        2. 10.2.1.2 CAN Termination
        3. 10.2.1.3 Loop Propagation Delay
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 CAN Basics
          1. 10.2.2.1.1 Differential Signal
          2. 10.2.2.1.2 Common-Mode Signal
          3. 10.2.2.1.3 ESD Protection
          4. 10.2.2.1.4 Transient Voltage Suppresser (TVS) Diodes
      3. 10.2.3 Application Curve
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Community Resources
    2. 13.2 Trademarks
    3. 13.3 Electrostatic Discharge Caution
    4. 13.4 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7 Specifications

7.1 Absolute Maximum Ratings

See Note (1)
MIN MAX UNIT
VCC Supply voltage(2) –0.3 7 V
VI(bus) Voltage at any bus terminal (CANH, CANL, SPLIT) –27 40 V
IO(OUT) Receiver output current –20 20 mA
Voltage input, transient pulse(3), (CANH, CANL, SPLIT) –200 200 V
VI Voltage input (TXD, STB) –0.5 6 V
TJ Junction temperature –55 170 °C
Tstg Storage temperature –40 125 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values, except differential I/O bus voltages, are with respect to network ground terminal.
(3) Tested in accordance with ISO 7637, test pulses 1, 2, 3a, 3b, 5, 6 & 7.

7.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) Bus terminals vs GND ±12000 V
All pins ±4000
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000
Machine model (MM) ANSI/ESDS5.2-1996 ±200
IEC Contact Discharge (IEC 61000-4-2) Bus terminals vs GND ±6000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

MIN NOM MAX UNIT
VCC Supply voltage 4.75 5.25 V
VI or VIC Voltage at any bus terminal (separately or common mode) –12(1) 12 V
VIH High-level input voltage TXD, STB 2 5.25 V
VIL Low-level input voltage 0 0.8 V
VID Differential input voltage –6 6 V
IOH High-level output current Driver –70 mA
Receiver –2
IOL Low-level output current Driver 70 mA
Receiver 2
tSS Maximum pulse width to remain in standby 0.7 μs
TJ Junction temperature –40 150 °C
(1) The algebraic convention, in which the least positive (most negative) limit is designated as minimum is used in this data sheet.

7.4 Thermal Information

THERMAL METRIC(1) SN65HVD1040 UNIT
D (SOIC)
8 PINS
RθJA Junction-to-ambient thermal resistance Low-K Thermal Resistance(2) 211 °C/W
High-K Thermal Resistance 131 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 79 °C/W
RθJB Junction-to-board thermal resistance 53.9 °C/W
ψJT Junction-to-top characterization parameter 15.4 °C/W
ψJB Junction-to-board characterization parameter 53.2 °C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) Tested in accordance with the Low-K or High-K thermal metric definitions of EIA/JESD51-3 for leaded surface-mount packages.

7.5 Driver Electrical Characteristics

over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
VO(D) Bus output voltage (Dominant) CANH VI = 0 V, STB at 0 V, RL = 60 Ω, See Figure 11 and Figure 12 2.9 3.4 4.5 V
CANL 0.8 1.75
VO®) Bus output voltage (Recessive) VI = 3 V, STB at 0 V, See Figure 11 and Figure 12 2 2.5 3 V
VO Bus output voltage (Standby) RL = 60 Ω, STB at VCC, See Figure 11 and Figure 12 –0.1 0.1 V
VOD(D) Differential output voltage (Dominant) VI = 0 V, RL = 60 Ω, STB at 0 V, See Figure 11 and Figure 12, and Figure 13 1.5 3 V
VI = 0 V, RL = 45 Ω, STB at 0 V, See Figure 11 and Figure 12 1.4 3
VSYM Output symmetry (Dominant or Recessive) [ VO(CANH) + VO(CANL) ] STB at 0 V, See Figure 12 and Figure 23 0.9 × VCC VCC 1.1×VCC V
VOD®) Differential output voltage (Recessive) VI = 3 V, RL = 60 Ω, STB at 0 V, See Figure 11 and Figure 12 –0.012 0.012 V
VI = 3 V, STB at 0 V, No Load –0.5 0.05
VOC(D) Common-mode output voltage (Dominant) STB at 0 V, See Figure 18 2 2.3 3 V
VOC(pp) Peak-to-peak common-mode output voltage 0.3
IIH High-level input current, TXD input VI at VCC –2 2 μA
IIL Low-level input current, TXD input VI at 0 V –50 –10 μA
IO(off) Power-off TXD Leakage current VCC at 0 V, TXD at 5 V 1 μA
IOS(ss) Short-circuit steady-state output current VCANH = –12 V, CANL Open, See Figure 22 –120 –72 mA
VCANH = 12 V, CANL Open, See Figure 22 0.36 1
VCANL = –12 V, CANH Open, See Figure 22 –1 –0.5
VCANL = 12 V, CANH Open, See Figure 22 71 120
CO Output capacitance See Input capacitance to ground in Receiver Electrical Characteristics.
(1) All typical values are at 25°C with a 5-V supply.

7.6 Receiver Electrical Characteristics

over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
VIT+ Positive-going input threshold voltage High-speed mode STB at 0 V, see Table 1 800 900 mV
VIT– Negative-going input threshold voltage 500 650
Vhys Hysteresis voltage (VIT+ – VIT–) STB at VCC 100 125
VIT Input threshold voltage Standby mode STB at VCC 500 1150
VOH High-level output voltage IO = –2 mA, see Figure 16 4 4.6 V
VOL Low-level output voltage IO = 2 mA, see Figure 16 0.2 0.4 V
II(off) Power-off bus input current CANH or CANL = 5 V, VCC at 0 V,
TXD at 0 V		 5 μA
IO(off) Power-off RXD leakage current VCC at 0 V, RXD at 5 V 20 μA
CI Input capacitance to ground, (CANH or CANL) TXD at 3 V, VI = 0.4 sin (4E6πt) + 2.5 V 20 pF
CID Differential input capacitance TXD at 3 V, VI = 0.4 sin (4E6πt) 10 pF
RID Differential input resistance TXD at 3 V, STD at 0 V 30 80 kΩ
RIN Input resistance, (CANH or CANL) TXD at 3 V, STD at 0 V 15 30 40
RI(m) Input resistance matching
[1 – RIN (CANH) / RIN (CANL))] x 100%		 VCANH = VCANL –3% 0% 3%
(1) All typical values are at 25°C with a 5-V supply.

7.7 Device Switching Characteristics

over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tloop1 Total loop delay, driver input to receiver output, Recessive to Dominant STB at 0 V,
see Figure 19		 90 230 ns
tloop2 Total loop delay, driver input to receiver output, Dominant to Recessive 90 230

7.8 Driver Switching Characteristics

over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH Propagation delay time, low-to-high-level output STB at 0 V, see Figure 14 25 65 120 ns
tPHL Propagation delay time, high-to-low-level output 25 45 120
tsk(p) Pulse skew (|tPHL – tPLH|) 25
tr Differential output signal rise time 25
tf Differential output signal fall time 50
ten Enable time from silent mode to dominant See Figure 17 10 μs
tdom Dominant time-out See Figure 20 300 450 700 μs

7.9 Receiver Switching Characteristics

over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tpLH Propagation delay time, low-to-high-level output STB at 0 V, TXD at 3 V, See Figure 16 60 100 130 ns
tpHL Propagation delay time, high-to-low-level output 45 70 130
tr Output signal rise time 8
tf Output signal fall time 8
tBUS Dominant time required on bus for wakeup from standby(1) STB at VCC Figure 21 0.7 5 μs
(1) The device under test shall not signal a wake-up condition with dominant pulses shorter than tBUS (min) and shall signal a wake-up condition with dominant pulses longer than tBUS (max). Dominant pulses with a length between tBUS (min) and tBUS (max) may lead to a wakeup.

7.10 Dissipation Ratings

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
PD Device Power Dissipation RL = 60 Ω, S at 0 V,
Input to TXD a 500kHz 50% duty-cycle square wave		 112 170 mW
TJS Junction Temperature, Thermal Shutdown (1) 190 °C
(1) Extended operation in thermal shutdown may affect device reliability, see the Thermal Shutdown.

7.11 Supply Current

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ICC Supply current, VCC Dominant VI = 0 V, 60 Ω Load, STB at 0 V 50 70 mA
Recessive VI = VCC, STB at 0 V 6 10
Standby STB at VCC, VI = VCC 5 12 μA

7.12 Split-Pin Characteristics

over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VO Output voltage –500 μA < IO < 500 μA 0.3 × VCC 0.5 × VCC 0.7 × VCC V
IO(stb) Standby mode leakage current STB at 2 V, –12 V ≤ VO  ≤ 12 V –5 5 μA

7.13 STB-Pin Characteristics

over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
IIH High level input current STB at 2 V –10 0 μA
IIL Low level input current STB at 0 V –10 0 μA

7.14 Typical Characteristics

SN65HVD1040 rec_dom_ta_lls632.gifFigure 1. Recessive-to-Dominant Loop Time vs Free-Air Temperature (Across Vcc)
SN65HVD1040 icc_sr_SLLS631.pngFigure 3. Supply Current (RMS) vs Signaling Rate
SN65HVD1040 ioh_vo_lls632.gifFigure 5. Driver High-Level Output Voltage vs High-Level Output Current
SN65HVD1040 iod_vcc_SLLS631.pngFigure 7. Driver Output Current vs Supply Voltage
SN65HVD1040 typ_emissions_SLLS631.gifFigure 9. Frequency Spectrum of Common-Mode Emissions
SN65HVD1040 dom_rec_ta_lls632.gifFigure 2. Dominant-to-Recessive Loop Time vs Free-Air Temperature (Across Vcc)
SN65HVD1040 iol_vo_SLLS631.pngFigure 4. Driver Low-Level Output Voltage vs Low-Level Output Current
SN65HVD1040 ddd_vo_ta_SLLS631.pngFigure 6. Driver Differential Output Voltage vs Free-Air Temperature (Across Vcc)
SN65HVD1040 vor_vid_SLLS631.pngFigure 8. Receiver Output Voltage vs Differential Input Voltage
SN65HVD1040 elv_imm_SLLS631.pngFigure 10. Direct Power Injection (DPI) Response vs Frequency