JAJSPH3I July   2003  – January 2023 SN65HVD1176 , SN75HVD1176

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Supply Current
    7. 6.7 Power Dissipation
    8. 6.8 Switching Characteristics
    9. 6.9 Typical Characteristics
      1.      Parameter Measurement Information
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Data Rate and Bus Length
        2. 8.2.1.2 Stub Length
        3. 8.2.1.3 Bus Loading
        4. 8.2.1.4 Receiver Failsafe
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 サード・パーティ製品に関する免責事項
    2. 11.2 Documentation Support
    3. 11.3 Related Links
    4. 11.4 サポート・リソース
    5. 11.5 Trademarks
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 用語集
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.8 Switching Characteristics

over recommended operating conditions (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYP#SLLS5631762MAXUNIT
DRIVER
tPLHPropagation delay time low-level-to-high-level outputRL = 54 Ω, CL = 50 pF,
See GUID-2FCD490B-A297-41AB-B6D1-1CE30764E0A6.html#SLLS563IMG6152		4710ns
tPHLPropagation delay time high-level-to-low-level output4710ns
tsk(p)Pulse skew | tPLH – tPHL |02ns
trDifferential output rise time237.5ns
tfDifferential output fall time237.5ns
tt(MLH), tt(MHL)Output transition skewSee GUID-2FCD490B-A297-41AB-B6D1-1CE30764E0A6.html#SLLS563IMG37550.21ns
tp(AZH), tp(BZH)
tp(AZL), tp(BZL)		Propagation delay time, high-impedance-to-active outputRL = 110 Ω,
CL = 50 pF
See GUID-2FCD490B-A297-41AB-B6D1-1CE30764E0A6.html#SLLS563IMG1918		RE at 0 V1020ns
tp(AHZ), tp(BHZ)
tp(ALZ), tp(BLZ)		Propagation delay time, active-to- high-impedance output1020ns
|tp(AZL) – tp(BZH)|
|tp(AZH) – tp(BZL)|		Enable skew time0.551.5ns
|tp(ALZ) – tp(BHZ)|
|tp(AHZ) – tp(BLZ)|		Disable skew time2.5ns
tp(AZH), tp(BZH)
tp(AZL), tp(BZL)		Propagation delay time, high-impedance-to-active output (from sleep mode)RL = 110 Ω,
CL = 50 pF
See GUID-2FCD490B-A297-41AB-B6D1-1CE30764E0A6.html#SLLS563IMG1918		RE at 5 V14μs
tp(AHZ), tp(BHZ)
tp(ALZ), tp(BLZ)		Propagation delay time, active-output-to high-impedance (to sleep mode)3050ns
t(CFB)Time from application of short-circuit to current foldbackSee GUID-2FCD490B-A297-41AB-B6D1-1CE30764E0A6.html#SLLS563IMG1540.5μs
t(TSD)Time from application of short-circuit to thermal shutdownTA = 25°C,
See GUID-2FCD490B-A297-41AB-B6D1-1CE30764E0A6.html#SLLS563IMG154		100μs
RECEIVER
tPLHPropagation delay time, low-to-high level outputSee GUID-2FCD490B-A297-41AB-B6D1-1CE30764E0A6.html#SLLS563IMG11432025ns
tPHLPropagation delay time, high-to-low level output2025ns
tsk(p)Pulse skew | tPLH – tPHL |12ns
trReceiver output voltage rise time24ns
tfReceiver output voltage fall time24ns
tPZHPropagation delay time, high-impedance-to-high-level outputDE at VCC,
See GUID-2FCD490B-A297-41AB-B6D1-1CE30764E0A6.html#SLLS563IMG3135		20ns
tPHZPropagation delay time, high-level-to-high-impedance output20ns
tPZLPropagation delay time, high-impedance-to-low-level outputDE at VCC,
See GUID-2FCD490B-A297-41AB-B6D1-1CE30764E0A6.html#SLLS563IMG5040		20ns
tPLZPropagation delay time, low-level-to-high-impedance output20ns
tPZHPropagation delay time, high-impedance-to-high-level output (standby to active)DE at 0 V,
See GUID-2FCD490B-A297-41AB-B6D1-1CE30764E0A6.html#SLLS563IMG8796		14μs
tPHZPropagation delay time, high-level-to-high-impedance output (active to standby)1320ns
tPZLPropagation delay time, high-impedance-to-low-level output (standby to active)DE at 0 V,
See GUID-2FCD490B-A297-41AB-B6D1-1CE30764E0A6.html#SLLS563IMG8796		24μs
tPLZPropagation delay time, low-level-to-high-impedance output (active to standby)1320ns
(1) All typical values are at VCC = 5 V and 25°C.