JAJSPZ4F November   2006  – March 2023 SN65HVD3080E , SN65HVD3083E , SN65HVD3086E

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  Power Dissipation Ratings
    3. 5.3  Electrostatic Discharge Protection
    4. 5.4  Supply Current
    5. 5.5  Recommended Operating Conditions
    6. 5.6  Thermal Information
    7. 5.7  Driver Electrical Characteristics
    8. 5.8  Driver Switching Characteristics
    9. 5.9  Receiver Electrical Characteristics
    10. 5.10 Receiver Switching Characteristics
    11. 5.11 Typical Characteristics
  6. Parameter Measurement Information
  7. Device Information
    1. 7.1 Function Tables
    2. 7.2 Equivalent Input and Output Schematic Diagrams
  8. Application Information
    1. 8.1 Hot-Plugging
  9. Device and Documentation Support
    1. 9.1 ドキュメントの更新通知を受け取る方法
    2. 9.2 サポート・リソース
    3. 9.3 商標
    4. 9.4 静電気放電に関する注意事項
    5. 9.5 用語集
  10. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Receiver Switching Characteristics

over recommended operating conditions unless otherwise noted
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH Propagation delay time, low-to-high-level output VID = -1.5 V to 1.5 V,
CL = 15 pF, See Figure 6-8
75 100 ns
tPHL Propagation delay time, high-to-low-level output 79 100
tsk(p) Pulse skew (|tPHL – tPLH|) 4 10
tr Output signal rise time 1.5 3
tf Output signal fall time 1.8 3
tPZH, tPZL Output enable time DE at VCC,
See Figure 6-9
10 50 ns
From standby DE at GND,
See Figure 6-9
1.7 3.5 μs
tPHZ, tPLZ Output disable time DE at GND or VCC,
See Figure 6-9
7 50 ns