JAJSUB3F July 1993 – April 2024 SN65LBC174 , SN75LBC174
PRODUCTION DATA
- 1
- 1 特長
- 2 アプリケーション
- 3 概要
- 4 Pin Configuration and Functions
- 5 Specifications
- 6 Parameter Measurement Information
- 7 Detailed Description
- 8 Device and Documentation Support
- 9 Revision History
- 10Mechanical, Packaging, and Orderable Information
パッケージ・オプション
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
メカニカル・データ（パッケージ｜ピン）
- N|16
- DW|20
サーマルパッド・メカニカル・データ
発注情報
6 Parameter Measurement Information
Figure 6-1 Differential and Common-Mode Output Voltages
Figure 6-2 Driver VOD Test Circuit
A. The
input pulse is supplied by a generator having the following characteristics: PRR
≤ 1MHz, duty cycle = 50%, tr ≤ 5ns, tf ≤ 5ns,
ZO = 50Ω.
B. CL includes probe and stray capacitance.
Figure 6-3 Time Waveforms for Driver Differential Output Test Circuit Delay and Transition
Figure 6-4 tPZH and tPHZ Test Circuit and Waveforms
A. The
input pulse is supplied by a generator having the following characteristics: PRR
≤ 1MHz, duty cycle = 50%, tr ≤ 5ns, tf ≤ 5ns,
ZO = 50Ω.
B. CL includes probe and stray capacitance.
Figure 6-5 tPZL and tPLZ Test Circuit and Waveforms