JAJSKL9B
September 2020 – November 2022
SN65MLVD203B
PRODUCTION DATA
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
絶対最大定格
6.2
ESD 定格
6.3
推奨動作条件
6.4
熱に関する情報
6.5
電気的特性
6.6
電気特性 - ドライバ
6.7
電気特性 - レシーバ
6.8
スイッチング特性 – ドライバ
6.9
スイッチング特性 – レシーバ
6.10
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagrams
8.3
Feature Description
8.3.1
Power-On-Reset
8.3.2
ESD Protection
8.3.3
RX Maximum Jitter While DE Toggling
8.4
Device Functional Modes
8.4.1
Operation with VCC < 1.5 V
8.4.2
Operations with 1.5 V ≤ VCC < 3 V
8.4.3
Operation with 3 V ≤ VCC < 3.6 V
8.4.4
Device Function Tables
8.4.5
Equivalent Input and Output Schematic Diagrams
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Multipoint Communications
9.2.2
Design Requirements
9.2.3
Detailed Design Procedure
9.2.3.1
Supply Voltage
9.2.3.2
Supply Bypass Capacitance
9.2.3.3
Driver Input Voltage
9.2.3.4
Driver Output Voltage
9.2.3.5
Termination Resistors
9.2.3.6
Receiver Input Signal
9.2.3.7
Receiver Input Threshold (Failsafe)
9.2.3.8
Receiver Output Signal
9.2.3.9
Interconnecting Media
9.2.3.10
PCB Transmission Lines
9.2.4
Application Curves
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.1.1
Microstrip vs. Stripline Topologies
9.4.1.2
Dielectric Type and Board Construction
9.4.1.3
Recommended Stack Layout
9.4.1.4
Separation Between Traces
9.4.1.5
Crosstalk and Ground Bounce Minimization
9.4.1.6
Decoupling
9.4.2
Layout Example
10
Device and Documentation Support
10.1
Documentation Support
10.1.1
Related Documentation
10.2
Receiving Notification of Documentation Updates
10.3
サポート・リソース
10.4
Trademarks
10.5
Electrostatic Discharge Caution
10.6
Glossary
11
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
RUM|16
MPQF223A
サーマルパッド・メカニカル・データ
RUM|16
QFND157C
発注情報
jajskl9b_oa
jajskl9b_pm
9.2.3
Detailed Design Procedure