JAJSFV6A August   2018  – January 2019 SN74AXCH8T245

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     代表的なアプリケーションの回路図
  4. 4 改訂履歴
  5. 5 概要（続き）
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Switching Characteristics, VCCA = 0.7 V
    7. 7.7  Switching Characteristics, VCCA = 0.8 V
    8. 7.8  Switching Characteristics, VCCA = 0.9 V
    9. 7.9  Switching Characteristics, VCCA = 1.2 V
    10. 7.10 Switching Characteristics, VCCA = 1.5 V
    11. 7.11 Switching Characteristics, VCCA = 1.8 V
    12. 7.12 Switching Characteristics, VCCA = 2.5 V
    13. 7.13 Switching Characteristics, VCCA = 3.3 V
    14. 7.14 Operating Characteristics: TA = 25°C
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Up-Translation and Down-Translation From 0.65 V to 3.6 V
      2. 9.3.2 Multiple Direction Control Pins
      3. 9.3.3 Bus-Hold Circuitry
      4. 9.3.4 Ioff Supports Partial-Power-Down Mode Operation
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curve
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13デバイスおよびドキュメントのサポート
    1. 13.1 ドキュメントのサポート
      1. 13.1.1 関連資料
    2. 13.2 ドキュメントの更新通知を受け取る方法
    3. 13.3 コミュニティ・リソース
    4. 13.4 商標
    5. 13.5 静電気放電に関する注意事項
    6. 13.6 Glossary
  14. 14メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9.3.3 Bus-Hold Circuitry

Active bus-hold circuitry holds unused or undriven data inputs at a valid logic state, which helps with board space savings and reduced component costs. Use of pull-up or pull-down resistors with the bus-hold circuitry is not recommended. See the Bus-Hold Circuit application note for more details. (SCLA015).

Note that the bus-hold circuitry always remains active when the corresponding supply is present (i.e. B port bus-hold circuits are active when VCCB is present, and A port bus-hold circuits are active when VCCA is present). The bus hold circuitry is also active even when the device is in a partial power down state or when the output enable pin is used to place all outputs into high impedance.