SCDS143C October   2003  – June  2015 SN74CB3Q3125

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • DBQ|16
  • RGY|14
  • DGV|14
  • PW|14
サーマルパッド・メカニカル・データ
発注情報

9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

9.1 Application Information

The SN74CB3Q3125 device can be used to control up to four channels simultaneously.

9.2 Typical Application

The application shown in Figure 5 is a 4-bit bus being controlled. The OE pins are used to control the chip from the bus controller. This is a very generic example and can apply to many situations. If an application requires less than 4 bits, be sure to tie the A side to either high or low on unused channels.

SN74CB3Q3125 scds143_app1.gifFigure 5. Typical Application of the SN74CB3Q3257

9.2.1 Design Requirements

The 0.1-µF capacitor must be placed as close as possible to the SN74CB3Q3257 device.

9.2.2 Detailed Design Procedure

  1. Recommended input conditions:
    • For specified high and low levels, see VIH and VIL in Recommended Operating Conditions
    • Inputs and outputs are overvoltage tolerant, which slows them to go as high as 5.5 V at any valid VCC
  2. Recommended output conditions:
    • Load currents must not exceed ±64 mA per channel
  3. Frequency selection criterion:
    • Added trace resistance or capacitance can reduce maximum frequency capability; use layout practices as directed in Layout

9.2.3 Application Curve

SN74CB3Q3125 scds143_appcurve1.pngFigure 6. Propagation Delay (tpd) Simulation Result at VCC = 3.3 V