JAJSPE2K
april 1998 – march 2023
SN74LV164A
PRODMIX
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Requirements: VCC = 2.5 V ± 0.2 V
6.7
Timing Requirements: VCC = 3.3 V ± 0.3 V
6.8
Timing Requirements: VCC = 5 V ± 0.5 V
6.9
Switching Characteristics: VCC = 2.5 V ± 0.2 V
6.10
Switching Characteristics: VCC = 3.3 V ± 0.3 V
6.11
Switching Characteristics: VCC = 5 V ± 0.5 V
6.12
Noise Characteristics
6.13
Operating Characteristics
6.14
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curves
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.2
Layout Example
10
Device and Documentation Support
10.1
Documentation Support
10.1.1
Related Documentation
10.2
ドキュメントの更新通知を受け取る方法
10.3
サポート・リソース
10.4
Trademarks
10.5
静電気放電に関する注意事項
10.6
用語集
11
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
メカニカル・データ（パッケージ｜ピン）
D|14
RGY|14
PW|14
DB|14
DGV|14
BQA|14
NS|14
サーマルパッド・メカニカル・データ
BQA|14
QFND686
発注情報
jajspe2k_oa
jajspe2k_pm
8.4
Device Functional Modes
Table 8-1 Function Table
(1)
(2)
INPUTS
OUTPUTS
CLR
CLK
A
B
Q
A
Q
B
...
Q
H
L
X
X
X
L
L
L
H
L
X
X
Q
A0
Q
B0
Q
H0
H
↑
H
H
H
Q
An
Q
Gn
H
↑
L
X
L
Q
An
Q
Gn
H
↑
X
L
L
Q
An
Q
Gn
(1)
Q
A0
, Q
B0
, Q
H0
= the level of Q
A
, Q
B
, or Q
H
, respectively, before the indicated steady-state input conditions were established.
(2)
Q
An
, Q
Gn
= the level of Q
A
or Q
G
before the most recent ↑ transition of the clock: indicates a 1-bit shift.