JAJSPE7K September   1997  – May 2024 SN74LV240A

PRODMIX  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics
    6. 5.6  Switching Characteristics, VCC = 2.5 V ±0.2 V
    7. 5.7  Switching Characteristics, VCC = 3.3 V ±0.3 V
    8. 5.8  Switching Characteristics, VCC = 5 V ±0.5 V
    9. 5.9  Noise Characteristics
    10. 5.10 Operating Characteristics
    11. 5.11 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support (Analog)
      1. 9.1.1 Related Links
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • DGV|20
  • DB|20
  • NS|20
  • DGS|20
  • DW|20
  • PW|20
サーマルパッド・メカニカル・データ
発注情報

5.4 Thermal Information

THERMAL METRIC(1) DW (SOIC) DB (SSOP ) DGV (TVSOP ) NS (SOP) PW (TSSOP) UNIT
20 PINS
RθJA Junction-to-ambient thermal resistance(2) 79.2 94.5 116.2 76.7 128.2 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 43.7 56.4 31.2 43.2 70.5
RθJB Junction-to-board thermal resistance 47.0 49.7 57.7 44.2 79.3
ψJT Junction-to-top characterization parameter 18.6 18.5 0.9 16.8 23.4
ψJB Junction-to-board characterization parameter 46.5 49.3 57.0 43.8 78.9
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A N/A N/A N/A
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) The package thermal impedance is calculated in accordance with JESD 51-7.