JAJSPJ0C
August 2005 – December 2022
SN74LVCH8T245
PRODUCTION DATA
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Characteristics: VCCA = 1.8 V ± 0.15 V
6.7
Switching Characteristics: VCCA = 2.5 V ± 0.2 V
6.8
Switching Characteristics: VCCA = 3.3 V ± 0.3 V
6.9
Switching Characteristics: VCCA = 5 V ± 0.5 V
6.10
Operating Characteristics
6.11
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Fully Configurable Dual-Rail Design
8.3.2
Partial-Power-Down Mode Operation
8.3.3
Active Bus Hold Circuitry
8.3.4
Balanced High-Drive CMOS Push-Pull Outputs
8.3.5
VCC Isolation
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Enable Times
9.2.3
Application Curve
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
ドキュメントの更新通知を受け取る方法
12.3
サポート・リソース
12.4
Trademarks
12.5
静電気放電に関する注意事項
12.6
用語集
13
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
RHL|24
MPQF163I
DGV|24
MPDS006C
PW|24
MPDS363A
DB|24
MPDS509
サーマルパッド・メカニカル・データ
発注情報
jajspj0c_oa
jajspj0c_pm
7
Parameter Measurement Information
Figure 7-1
Load Circuit and Voltage Waveforms