SDLS144 Data sheet

SDLS144D April 1985 – October 2016 SN54LS240 , SN54LS241 , SN54LS244 , SN54S240 , SN54S241 , SN54S244 , SN74LS240 , SN74LS241 , SN74LS244 , SN74S240 , SN74S241 , SN74S244

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）

DW|20
- MPDS173B
N|20
- MPDI002C

サーマルパッド・メカニカル・データ

発注情報

9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

9.1 Application Information

The SNx4LS24x, SNx4S24x octal buffers and line drivers are designed to be used for a multitude of bus interface type applications where output drive or PCB trace length is a concern.

9.2 Typical Application

SN54LS240 SN54LS241 SN54LS244 SN54S240 SN54S241 SN54S244 SN74LS240 SN74LS241 SN74LS244 SN74S240 SN74S241 SN74S244 app_info_01_sdls144.gif

Figure 22. SNx4LS241 and SNx4S241 Used as Repeater or Level Restorer

9.2.1 Design Requirements

This device uses Schottky transistor logic technology. Take care to avoid bus contention because it can drive currents that would exceed maximum limits. The high drive creates fast edges into light loads, so routing and load conditions must be considered to prevent ringing.

9.2.2 Detailed Design Procedure

Power Supply
- Each device must maintain a supply voltage between 4.5 V and 5.5 V.
Inputs
- Input signals must meet the V_IH and V_IL specifications in Electrical Characteristics – SNx4LS24x.
- Inputs leakage values (I_I, I_IH, I_IL) from Electrical Characteristics – SNx4LS24x must be considered.
Outputs
- Output signals are specified to meet the V_OH and V_OL specifications in Electrical Characteristics – SNx4LS24x as a minimum (the values could be closer to V_CC for high signals or GND for low signals).
- TI recommends maintaining output currents as specified in Recommended Operating Conditions.
- The part can be damaged by sourcing or sinking too much current (see Electrical Characteristics – SNx4LS24x for details).

9.2.3 Application Curve

SN54LS240 SN54LS241 SN54LS244 SN54S240 SN54S241 SN54S244 SN74LS240 SN74LS241 SN74LS244 SN74S240 SN74S241 SN74S244 typicalcharvolmax.gif

Figure 23. V_OL vs I_OL

9.3 System Examples

The SNx4LS240 and SNx4S240 devices can be used to buffer signals along a memory bus. The increased output drive helps data transmission reliability. Figure 24 shows a schematic of this example.

SN54LS240 SN54LS241 SN54LS244 SN54S240 SN54S241 SN54S244 SN74LS240 SN74LS241 SN74LS244 SN74S240 SN74S241 SN74S244 app_info_02_sdls144.gif

4-bit organization can be applied to handle binary or BCD

Figure 24. SNx4LS240 and SNx4S240 Used as System or Memory Bus Driver

The SNx4LS240 and SNx4S240 devices have two independently controlled 4-bit drivers, and can be used to buffer signals in a bidirectional manner along a data bus. Figure 25 shows the SNx4LS240 or SNx4S240 used in this manner.

SN54LS240 SN54LS241 SN54LS244 SN54S240 SN54S241 SN54S244 SN74LS240 SN74LS241 SN74LS244 SN74S240 SN74S241 SN74S244 app_info_03_sdls144.gif

Figure 25. Independent 4-Bit But Drivers/Receivers in a Single Package

The enable pins on the SNx4LS241 and SNx4S241 devices can be used to help direct signals along a shared party-line bus. Figure 26 shows a general configuration of how to implement this structure. Take care to ensure that bus contention does not occur.

SN54LS240 SN54LS241 SN54LS244 SN54S240 SN54S241 SN54S244 SN74LS240 SN74LS241 SN74LS244 SN74S240 SN74S241 SN74S244 app_info_04_sdls144.gif

Figure 26. Party-Line Bus System With Multiple Inputs, Outputs, and Receivers