JAJSNO9 January   2022 TAA5212

ADVANCE INFORMATION  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Timing Requirements: I2C Interface
    7. 6.7  Switching Characteristics: I2C Interface
    8. 6.8  Timing Requirements: SPI Interface
    9. 6.9  Switching Characteristics: SPI Interface
    10. 6.10 Timing Requirements: TDM, I2S or LJ Interface
    11. 6.11 Switching Characteristics: TDM, I2S or LJ Interface
    12. 6.12 Timing Requirements: PDM Digital Microphone Interface
    13. 6.13 Switching Characteristics: PDM Digial Microphone Interface
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Hardware Control
      2. 8.3.2 Serial Interfaces
        1. 8.3.2.1 Control Serial Interfaces
        2. 8.3.2.2 Audio Serial Interfaces
          1. 8.3.2.2.1 Time Division Multiplexed Audio (TDM) Interface
          2. 8.3.2.2.2 Inter IC Sound (I2S) Interface
          3. 8.3.2.2.3 Left-Justified (LJ) Interface
        3. 8.3.2.3 Using Multiple Devices With Shared Buses
      3. 8.3.3 Phase-Locked Loop (PLL) and Clock Generation
      4. 8.3.4 Input Channel Configurations
      5. 8.3.5 Reference Voltage
      6. 8.3.6 Programmable Microphone Bias
      7. 8.3.7 Signal-Chain Processing
        1. 8.3.7.1 ADC Signal-Chain
          1. 8.3.7.1.1 Programmable Channel Gain and Digital Volume Control
          2. 8.3.7.1.2 Programmable Channel Gain Calibration
          3. 8.3.7.1.3 Programmable Channel Phase Calibration
          4. 8.3.7.1.4 Programmable Digital High-Pass Filter
          5. 8.3.7.1.5 Programmable Digital Biquad Filters
          6. 8.3.7.1.6 Programmable Channel Summer and Digital Mixer
          7. 8.3.7.1.7 Configurable Digital Decimation Filters
            1. 8.3.7.1.7.1 Linear Phase Filters
              1. 8.3.7.1.7.1.1 Sampling Rate: 16 kHz or 14.7 kHz
              2. 8.3.7.1.7.1.2 Sampling Rate: 24 kHz or 22.05 kHz
              3. 8.3.7.1.7.1.3 Sampling Rate: 32 kHz or 29.4 kHz
              4. 8.3.7.1.7.1.4 Sampling Rate: 48 kHz or 44.1 kHz
              5. 8.3.7.1.7.1.5 Sampling Rate: 96 kHz or 88.2 kHz
      8. 8.3.8 Interrupts, Status, and Digital I/O Pin Multiplexing
      9. 8.3.9 Programmable Channel Phase Calibration
    4. 8.4 Device Functional Modes
    5. 8.5 Register Maps
      1. 8.5.1 VEGA Registers
      2. 8.5.2 TAA5212 Registers
      3. 8.5.3 TAA5212 Registers
    6. 8.6 Feature Description
    7. 8.7 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Application
      2. 9.2.2 Design Requirements
      3. 9.2.3 Detailed Design Procedure
      4. 9.2.4 Application Performance Plots
      5. 9.2.5 What to Do and What Not to Do
  11. 10Power Supply Recommendations
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 サポート・リソース
    4. 12.4 Trademarks
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 用語集

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.3.6 Programmable Microphone Bias

The device integrates a built-in, low-noise microphone bias pin that can be used in the system for biasing electret-condenser microphones or providing the supply to the MEMS analog or digital microphone. The integrated bias amplifier supports up to 10 mA of load current that can be used for multiple microphones and is designed to provide a combination of high PSRR, low noise, and programmable bias voltages to allow the biasing to be fine tuned for specific microphone combinations.

When using this MICBIAS pin for biasing or supplying to multiple microphones, avoid any common impedance on the board layout for the MICBIAS connection to minimize coupling across microphones. Table 8-11 shows the available microphone bias programmable options.

Table 8-11 MICBIAS Programmable Settings
P0_R77_D[3:2] : MICBIAS_VAL[1:0]P0_R77_D[1:0] : VREF_FSCALE[1:0]MICBIAS OUTPUT VOLTAGE
00 (default)00 (default)2.75 V (same as the VREF output)
012.5 V (same as the VREF output)
101.375 V (same as the VREF output)
11 Reserved (do not use these settings)
0100 (default)1.375 V (0.5 times the VREF output)
011.250 V (0.5 times the VREF output)
10 or 11Reserved (do not use these settings)
10XXReserved (do not use these settings)
11XXSame as AVDD

The microphone bias output can be powered on or powered off (default) by configuring the MICBIAS_PDZ, P0_R120_D5 register bit. Additionally, the device provides an option to configure the GPIO1 or GPIx pin to directly control the microphone bias output powering on or off. This feature is useful to control the microphone directly without engaging the host for I2C or SPI communication. The MICBIAS_PDZ, P0_R120_D5 register bit value is ignored if the GPIO1 or GPIx pin is configured to set the microphone bias on or off.