JAJSNO5 December   2023 TAC5242

ADVANCE INFORMATION  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements: TDM, I2S or LJ Interface
    7. 6.7 Switching Characteristics: TDM, I2S or LJ Interface
  8. Parameter Measurement Information
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Hardware Control
      2. 8.3.2 Audio Serial Interfaces
        1. 8.3.2.1 Time Division Multiplexed Audio (TDM) Interface
        2. 8.3.2.2 Inter IC Sound (I2S) Interface
      3. 8.3.3 Phase-Locked Loop (PLL) and Clock Generation
      4. 8.3.4 Analog Input Output Configurations
      5. 8.3.5 Reference Voltage
      6. 8.3.6 ADC Signal-Chain
        1. 8.3.6.1 Digital High-Pass Filter
        2. 8.3.6.2 Configurable Digital Decimation Filters
          1. 8.3.6.2.1 Linear Phase Filters
            1. 8.3.6.2.1.1 Sampling Rate: 16 kHz or 14.7 kHz
            2. 8.3.6.2.1.2 Sampling Rate: 24 kHz or 22.05 kHz
            3. 8.3.6.2.1.3 Sampling Rate: 32 kHz or 29.4 kHz
            4. 8.3.6.2.1.4 Sampling Rate: 48 kHz or 44.1 kHz
            5. 8.3.6.2.1.5 Sampling Rate: 96 kHz or 88.2 kHz
      7. 8.3.7 DAC Signal-Chain
        1. 8.3.7.1 Configurable Digital Interpolation Filters
          1. 8.3.7.1.1 Linear Phase Filters
            1. 8.3.7.1.1.1 Sampling Rate: 16 kHz or 14.7 kHz
            2. 8.3.7.1.1.2 Sampling Rate: 24 kHz or 22.05 kHz
            3. 8.3.7.1.1.3 Sampling Rate: 32 kHz or 29.4 kHz
            4. 8.3.7.1.1.4 Sampling Rate: 48 kHz or 44.1 kHz
            5. 8.3.7.1.1.5 Sampling Rate: 96 kHz or 88.2 kHz
            6. 8.3.7.1.1.6 Sampling Rate: 384 kHz or 352.8 kHz
    4. 8.4 Device Functional Modes
      1. 8.4.1 Active Mode
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Application
      2. 9.2.2 Design Requirements
      3. 9.2.3 Detailed Design Procedure
  11. 10Power Supply Recommendations
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 用語集
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Analog Input Output Configurations

The device supports simultaneous recording of up to two channels using the high-performance stereo ADC. The device consists of two pairs of analog input pins (INxP and INxM) which can be configured in single-ended or differential input mode by setting MD4 and MD5 pins. The input source for the analog pins can be from electret condenser analog microphones, micro electrical-mechanical system (MEMS) analog microphones, or line-in (auxiliary) inputs from the system board.

The voice or audio signal inputs can be capacitively coupled (AC-coupled) or DC-coupled to the device. For best distortion performance, use of low-voltage coefficient capacitors for AC-coupling is recommended. The typical input impedance for the TAC5242 is 5 kΩ for the INxP or INxM pins. The value of the coupling capacitor in AC-coupled mode must be chosen so that the high-pass filter formed by the coupling capacitor and the input impedance do not affect the signal content. Before proper recording can begin, this coupling capacitor must be charged up to the common-mode voltage at power-up. To enable quick charging, the device has a quick charge scheme to speed up the charging of the coupling capacitor at power-up. Quick-charge time for the device is configured using MD3 pin along with digital HPF. Refer to Table 8-8 for quick charge time based on MD3 pin configuration.

The device supports playback of two channels using the high-performance stereo DAC. The device consists of two pairs of analog output pins (OUTxP and OUTxM) which can be configured in single-ended or differential input mode by setting MD4 and MD5 pins. The input source for these channels is from TDM/I2S.

Table 8-8 shows the analog input output configuration modes available with MD4 and MD5 configuration

Table 8-7 Analog Input Output Configurations
MD4 MD5 ANALOG INPUT CONFIGURATION ANALOG OUTPUT CONFIGURATION
Low Low Differential input; AC-Coupled only Differential Output; Lineout load only
Low High Differential input; AC or DC-Coupled Differential Output; Receiver or Lineout load
High Low Single Ended Input on INxP Single ended output; Lineout only
High High Single Ended Input on INxP Pseudo differential output; Headphone or Lineout load