JAJSNP2A
December 2023 – October 2024
TAD5142
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Timing Requirements: TDM, I2S or LJ Interface
5.7
Switching Characteristics: TDM, I2S or LJ Interface
5.8
Timing Diagrams
5.9
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
Hardware Control
6.3.2
Audio Serial Interfaces
6.3.2.1
Time Division Multiplexed Audio (TDM) Interface
6.3.2.2
Inter IC Sound (I2S) Interface
6.3.2.3
Left-Justified (LJ) Interface
6.3.3
Phase-Locked Loop (PLL) and Clock Generation
6.3.4
Analog Output Configurations
6.3.5
Reference Voltage
6.3.6
DAC Signal-Chain
6.3.6.1
Digital Interpolation Filters
6.3.6.1.1
Linear-phase filters
6.3.6.1.1.1
Sampling Rate: 8kHz or 7.35kHz
6.3.6.1.1.2
Sampling Rate: 16kHz or 14.7kHz
6.3.6.1.1.3
Sampling Rate: 24kHz or 22.05kHz
6.3.6.1.1.4
Sampling Rate: 32kHz or 29.4kHz
6.3.6.1.1.5
Sampling Rate: 48kHz or 44.1kHz
6.3.6.1.1.6
Sampling Rate: 96kHz or 88.2kHz
6.3.6.1.1.7
Sampling Rate: 192kHz or 176.4kHz
6.3.6.1.2
Low-latency Filters
6.3.6.1.2.1
Sampling Rate: 24kHz or 22.05kHz
6.3.6.1.2.2
Sampling Rate: 32kHz or 29.4kHz
6.3.6.1.2.3
Sampling Rate: 48kHz or 44.1kHz
6.3.6.1.2.4
Sampling Rate: 96kHz or 88.2kHz
6.3.6.1.2.5
Sampling Rate: 192kHz or 176.4kHz
6.4
Device Functional Modes
6.4.1
Active Mode
7
Application and Implementation
7.1
Application Information
7.2
Typical Application
7.2.1
Application
7.2.2
Design Requirements
7.2.3
Detailed Design Procedure
7.2.4
Application Performance Plots
7.3
Power Supply Recommendations
7.4
Layout
7.4.1
Layout Guidelines
7.4.2
Layout Example
8
Device and Documentation Support
8.1
Documentation Support
8.1.1
Related Documentation
8.2
ドキュメントの更新通知を受け取る方法
8.3
サポート・リソース
8.4
Trademarks
8.5
静電気放電に関する注意事項
8.6
用語集
9
Revision History
10
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
RGE|24
MPQF124G
サーマルパッド・メカニカル・データ
RGE|24
QFND808
発注情報
jajsnp2a_oa
jajsnp2a_pm
6.2
Functional Block Diagram
Figure 6-1
Functional Block Diagram