JAJSIU0C
April 2020 – September 2023
TAS5441-Q1
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Requirements for I2C Interface Signals
6.7
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Analog Audio Input and Preamplifier
7.3.2
Pulse-Width Modulator (PWM)
7.3.3
Gate Drive
7.3.4
Power FETs
7.3.5
Load Diagnostics
7.3.5.1
Load Diagnostics Sequence
7.3.5.2
Faults During Load Diagnostics
7.3.6
Protection and Monitoring
7.3.7
I2C Serial Communication Bus
7.3.7.1
I2C Bus Protocol
7.3.7.2
Random Write
7.3.7.3
Random Read
7.3.7.4
Sequential Read
7.4
Device Functional Modes
7.4.1
Hardware Control Pins
7.4.2
EMI Considerations
7.4.3
Operating Modes and Faults
7.5
Register Maps
7.5.1
I2C Address Register Definitions
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.1.1
Amplifier Output Filtering
8.2.1.2
Amplifier Output Snubbers
8.2.1.3
Bootstrap Capacitors
8.2.1.4
Analog Audio Input Filter
8.2.2
Detailed Design Procedure
8.2.2.1
Unused Pin Connections
8.2.2.1.1
MUTE Pin
8.2.2.1.2
STANDBY Pin
8.2.2.1.3
I2C Pins (SDA and SCL)
8.2.2.1.4
Terminating Unused Outputs
8.2.2.1.5
Using a Single-Ended Audio Input
8.2.3
Application Curves
9
Layout
9.1
Layout Guidelines
9.2
Layout Examples
9.2.1
Top Layer
9.2.2
Second Layer – Signal Layer
10
Device and Documentation Support
10.1
Device Support
10.1.1
サード・パーティ製品に関する免責事項
10.2
Documentation Support
10.2.1
Related Documentation
10.3
ドキュメントの更新通知を受け取る方法
10.4
サポート・リソース
10.5
Trademarks
10.6
静電気放電に関する注意事項
10.7
用語集
11
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
PWP|16
MPDS371A
サーマルパッド・メカニカル・データ
PWP|16
PPTD153P
発注情報
jajsiu0c_oa
jajsiu0c_pm
7
Detailed Description