SLOSEA8 December   2024 TAS5815

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5.   Device Comparison Table
  6. 4 Pin Configuration and Functions
  7. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
  8. 6 Typical Characteristics
    1. 6.1 Bridge Tied Load (BTL) Configuration Curves with BD Modulation
    2. 6.2 Bridge Tied Load (BTL) Configuration Curves with 1SPW Modulation
    3. 6.3 Parallel Bridge Tied Load (PBTL) Configuration With BD Modulation
    4. 6.4 Parallel Bridge Tied Load (PBTL) Configuration With 1SPW Modulation
  9. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power Supplies
      2. 7.3.2 Device Clocking
      3. 7.3.3 Serial Audio Port – Clock Rates
      4. 7.3.4 Serial Audio Port - Data Formats and Bit Depths
      5. 7.3.5 Clock Halt Auto-recovery
      6. 7.3.6 Sample Rate on the Fly Change
      7. 7.3.7 Digital Audio Processing
      8. 7.3.8 Class D Audio Amplifier
        1. 7.3.8.1 Speaker Amplifier Gain Select
    4. 7.4 Device Functional Modes
      1. 7.4.1 Software Control
      2. 7.4.2 Speaker Amplifier Operating Modes
        1. 7.4.2.1 BTL Mode
        2. 7.4.2.2 PBTL Mode
      3. 7.4.3 Low EMI Modes
        1. 7.4.3.1 Minimize EMI with Spread Spectrum
        2. 7.4.3.2 Minimize EMI with channel to channel phase shift
        3. 7.4.3.3 Minimize EMI with Multi-Devices PWM Phase Synchronization
      4. 7.4.4 Thermal Foldback
      5. 7.4.5 Device State Control
      6. 7.4.6 Device Modulation
        1. 7.4.6.1 BD Modulation
        2. 7.4.6.2 1SPW Modulation
        3. 7.4.6.3 Hybrid Modulation
      7. 7.4.7 Load Detect
        1. 7.4.7.1 Short Load Detect
        2. 7.4.7.2 Open Load Detect
    5. 7.5 Programming and Control
      1. 7.5.1 I2C Serial Communication Bus
      2. 7.5.2 Target Address
        1. 7.5.2.1 Random Write
        2. 7.5.2.2 Random Read
        3. 7.5.2.3 Sequential Write
        4. 7.5.2.4 Sequential Read
        5. 7.5.2.5 DSP Memory Book, Page and BQ update
        6. 7.5.2.6 Example Use
        7. 7.5.2.7 Checksum
          1. 7.5.2.7.1 Cyclic Redundancy Check (CRC) Checksum
          2. 7.5.2.7.2 Exclusive or (XOR) Checksum
      3. 7.5.3 Control via Software
        1. 7.5.3.1 Startup Procedures
        2. 7.5.3.2 Shutdown Procedures
        3. 7.5.3.3 Protection and Monitoring
          1. 7.5.3.3.1 Overcurrent Shutdown (OCSD)
          2. 7.5.3.3.2 DC Detect
          3. 7.5.3.3.3 Device Over Temperature Protection
          4. 7.5.3.3.4 Over Voltage Protection
          5. 7.5.3.3.5 Under Voltage Protection
          6. 7.5.3.3.6 Clock Fault
  10. 8 Register Maps
    1. 8.1 CONTROL PORT Registers
  11. 9 Application Information Disclaimer
    1. 9.1 Application Information
      1. 9.1.1 Bootstrap Capacitors
      2. 9.1.2 Inductor Selections
      3. 9.1.3 Power Supply Decoupling
      4. 9.1.4 Output EMI Filtering
    2. 9.2 Typical Application
      1. 9.2.1 2.0 (Stereo BTL) System
        1. 9.2.1.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Step 1: Hardware Integration
        2. 9.2.2.2 Step 2: Speaker Tuning
        3. 9.2.2.3 Step 3: Software Integration
      3. 9.2.3 MONO (PBTL) System
        1. 9.2.3.1 Design Requirements
      4. 9.2.4 Advanced 2.1 System (Two TAS5815 Devices)
  12. 10Power Supply Recommendations
    1. 10.1 DVDD Supply
    2. 10.2 PVDD Supply
  13. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 General Guidelines for Audio Amplifiers
      2. 11.1.2 Importance of PVDD Bypass Capacitor Placement on PVDD Network
      3. 11.1.3 Optimizing Thermal Performance
        1. 11.1.3.1 Device, Copper, and Component Layout
        2. 11.1.3.2 Stencil Pattern
          1. 11.1.3.2.1 PCB footprint and Via Arrangement
          2. 11.1.3.2.2 Solder Stencil
    2. 11.2 Layout Example
  14. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Device Nomenclature
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  15. 13Revision History
  16. 14Mechanical and Packaging Information
    1. 14.1 Package Option Addendum

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9.2.1.1 Design Requirements

  • Power supplies:
    • 3.3V or 1.8V supply for DVDD.
    • 4.5V to 26.4V supply for PVDD.
  • Communication: host processor serving as I2C compliant master.
  • External memory (Such as EEPROM and FLASH) used for coefficients.

The requirements for the supporting components for the TAS5815 device in a Stereo 2.0 (BTL) system are provide in Table 9-3\ and Table 9-4.

Table 9-3 Supporting Component Requirements for Stereo 2.0 (BTL) system (With Ferrite bead as output filter)
REFERENCE DESIGNATOR VALUE SIZE DETAILED DESCRIPTION
C1,C2,C5,C6 22uF 0805 CAP, CERM, 22µF, 35V, +/- 20%, JB, 0805
C3,C4 0.1uF 0402 CAP, CERM, 0.1µF, 50V, +/- 10%, X7R, 0402
C7 4.7uF 0603 CAP, CERM, 4.7µF, 10V, +/- 10%, X5R, 0603
C8 0.1uF 0603 CAP, CERM, 0.1µF, 16V, +/- 10%, X7R, 0603
C9,C10 1uF 0603 CAP, CERM, 1µF, 16V, +/- 10%, X5R, 0603
R1 4.70kΩ 0402 RES, 4.70kΩ, 1%, 0.0625W, 0402
R2 10.0kΩ 0404 RES, 10.0kΩ, 1%, 0.063W, 0402
C11,C12,C13,C14 0.22uF 0603 CAP, CERM, 0.22µF, 50V, +/- 10%, X7R, 0603
C15,C16,C17,C18,C19,C20,C21,C22,C23 2200pF 0603 CAP, CERM, 2200pF, 100V,+/- 10%, X7R, 0603
R3,R4,R5,R6 68ohm 0603 ES, 68Ω, 5%, 0.1W, 0603
L1,L2,L3,L4 300ohm 0806 Ferrite Bead, 300Ω @ 100MHz, 3.1A, 0806
L5 100 ohm 0806 Ferrite Bead, 100ohm @ 100MHz, 4A, 0806

With Low EMI technology, TAS5815 keeps enough EMI margin for most of application cases where PVDD < 14V with ferrite bead (Low BOM cost). With Ferrite Bead and capacitor as the output filter, Table 9-3 includes a good configuration (proper value of ferrite bead, capacitor, resistor) to achieve enough EMI margin for the typical case which PVDD = 12V, Speaker Load = 8Ω/6Ω, each speaker wire with 1m length, Output Power = 1W/4W/8W for each channel.

  • Select Ferrite bead (L1~L5). The trade-off is impedance and rated current. If the rated current meet the system's requirement, larger impedance means larger EMI margin for the EMI, especially for the frequency band 5 MHz~50 MHz. The typical ferrite bead recommend for TAS5815 is NFZ2MSM series (Murata) and UPZ2012E series (Sunlord). 300 ohm at 100 MHz ferrite bead is a typical value which can pass EMI for most of application cases.
  • Select capacitor (C15~C23). The trade-off is capacitor value and idle current. Larger capacitor means larger idle current, increase the capacitor value from 1nF to 2.2nF makes much help for frequency band 5 MHz~100 MHz.
  • Using Ferrite bead as the output filter, recommend designer to use Fsw = 384 kHz with Spread spectrum enable, BD Modulation, refer to Section 7.4.3.1.
  • With Ferrite bead as the output power. In order to pass EMI (AC Conducted Emission) standard, an AC to DC adapter with EMI filter in it is needed. For most of applications (TV/Voice Control Speaker/Wireless speaker/Soundbar) which need a 110V~220V power supply usually has a EMI filter in the AC to DC adapter. Some cases use DC power supply and also need to test the DC Conducted Emission , this applications (Automotive/Industry) need a simple EMI filter on PVDD for TAS5815. Refer to application note: AN-2162 Simple Success With Conducted EMI From DC to DC Converters.
Table 9-4 Supporting Component Requirements for Stereo 2.0 (BTL) system (With Inductor as output filter)
REFERENCE DESIGNATOR VALUE SIZE DETAILED DESCRIPTION
C1,C6 390µF 10mmx10mm CAP, AL, 390µF, 35V, ±20%, 0.08 ohm, SMD
C2,C5 22µF 0603 CAP, CERM, 22µF, 35V, ±20%, JB, 0805
C3,C4 0.1µF 0402 CAP, CERM, 0.1µF, 50V, ±10%, X7R, 0402
C7 4.7µF 0603 CAP, CERM, 4.7µF, 10V, ±10%, X5R, 0603
C8 0.1µF 0603 CAP, CERM, 0.1µF, 16V, ±10%, X7R, 0603
C9,C10 1µF 0603 CAP, CERM, 1µF, 16V, ±10%, X5R, 0603
R1 15.0kΩ 0402 RES, 15.0kΩ, 1%, 0.0625 W, 0402
R2 10.0kΩ 0404 RES, 10.0kΩ, 1%, 0.063W, 0402
C11,C12,C13,C14 0.22µF 0603 CAP, CERM, 0.22µF, 50V, ±10%, X7R, 0603
C15,C16,C17,C18 0.68µF 0805 CAP, CERM, 0.68µF, 50V, ±10%, X7R, 0805
L1,L2,L3,L4 10µH Inductor, Shielded, 10µH, 4.4A, 0.023Ω, SMD

With an inductor as the output filter, designers can achieve ultra low idle current (with Hybrid Modulation or 1SPW Modulation) and keep large EMI margin. As the switching frequency of TAS5815 can be adjustable from 384 kHz to 768 kHz. Higher switching frequency means smaller Inductor value needed.

  • With 768kHz switching frequency. Designers can select 10uH + 0.68µF or 4.7µH +0.68µF as the output filter, this will help customer to save the Inductor size with the same rated current during the inductor selection. With 4.7uH + 0.68uF, make sure PVDD ≤ 12V to avoid the large ripple current to trigger the OC threshold (5A).
  • With 384kHZ switching frequency. Designers can select 22µH + 0.68µF or 15µH + 0.68µF or 10µH + 0.68µF as the output filter, this will help customer to save power dissipation for some battery power supply application. With 10µH + 0.68µF, make sure PVDD ≤ 12V to avoid the large ripple current to trigger the OC threshold (5A).