JAJSKD3
november 2020
TAS6424MS-Q1
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Device Options
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD 定格
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Typical Characteristics
8
Parameter Measurement Information
9
Detailed Description
9.1
Overview
9.2
Functional Block Diagram
9.3
Feature Description
9.3.1
Serial Audio Port
9.3.1.1
I2S Mode
9.3.1.2
Left-Justified Timing
9.3.1.3
Right-Justified Timing
9.3.1.4
TDM Mode
9.3.1.5
Supported Clock Rates
9.3.1.6
Audio-Clock Error Handling
9.3.2
High-Pass Filter
9.3.3
Volume Control and Gain
9.3.4
High-Frequency Pulse-Width Modulator (PWM)
9.3.5
Channel-to-Channel Phase Control
9.3.6
Gate Drive
9.3.7
Power FETs
9.3.8
Load Diagnostics
9.3.8.1
DC Load Diagnostics
9.3.8.2
Line Output Diagnostics
9.3.8.3
AC Load Diagnostics
9.3.8.3.1
Impedance Magnitude Measurement
9.3.8.3.2
Impedance Phase Reference Measurement
9.3.8.3.3
Impedance Phase Measurement
9.3.9
Protection and Monitoring
9.3.9.1
Overcurrent Limit (ILIMIT)
9.3.9.2
Overcurrent Shutdown (ISD)
9.3.9.3
DC Detect
9.3.9.4
Clip Detect
9.3.9.5
Global Overtemperature Warning (OTW), Overtemperature Shutdown (OTSD)
9.3.9.6
Channel Overtemperature Warning [OTW(i)] and Shutdown [OTSD(i)]
9.3.9.7
Undervoltage (UV) and Power-On-Reset (POR)
9.3.9.8
Overvoltage (OV) and Load Dump
9.3.10
Power Supply
9.3.10.1
Vehicle-Battery Power-Supply Sequence
9.3.10.2
Power-Down Sequence
9.3.10.3
Boosted Power-Supply Sequence
9.3.11
Hardware Control Pins
9.3.11.1
FAULT
9.3.11.2
WARN
9.3.11.3
MUTE
9.3.11.4
STANDBY
9.4
Device Functional Modes
9.4.1
Operating Modes and Faults
9.5
Programming
9.5.1
I2C Serial Communication Bus
9.5.2
I2C Bus Protocol
9.5.3
Random Write
9.5.4
Sequential Write
9.5.5
Random Read
9.5.6
Sequential Read
9.6
Register Maps
9.6.1
Mode Control Register (address = 0x00) [default = 0x00]
9.6.2
Miscellaneous Control 1 Register (address = 0x01) [default = 0x32]
9.6.3
Miscellaneous Control 2 Register (address = 0x02) [default = 0x62]
9.6.4
SAP Control (Serial Audio-Port Control) Register (address = 0x03) [default = 0x04]
9.6.5
Channel State Control Register (address = 0x04) [default = 0x55]
9.6.6
Channel 1 Through 4 Volume Control Registers (address = 0x05–0x08) [default = 0xCF]
9.6.7
DC Load Diagnostic Control 1 Register (address = 0x09) [default = 0x00]
9.6.8
DC Load Diagnostic Control 2 Register (address = 0x0A) [default = 0x11]
9.6.9
DC Load Diagnostic Control 3 Register (address = 0x0B) [default = 0x11]
9.6.10
DC Load Diagnostic Report 1 Register (address = 0x0C) [default = 0x00]
9.6.11
DC Load Diagnostic Report 2 Register (address = 0x0D) [default = 0x00]
9.6.12
DC Load Diagnostics Report 3 Line Output Register (address = 0x0E) [default = 0x00]
9.6.13
Channel State Reporting Register (address = 0x0F) [default = 0x55]
9.6.14
Channel Faults (Overcurrent, DC Detection) Register (address = 0x10) [default = 0x00]
9.6.15
Global Faults 1 Register (address = 0x11) [default = 0x00]
9.6.16
Global Faults 2 Register (address = 0x12) [default = 0x00]
9.6.17
Warnings Register (address = 0x13) [default = 0x20]
9.6.18
Pin Control Register (address = 0x14) [default = 0x00]
9.6.19
AC Load Diagnostic Control 1 Register (address = 0x15) [default = 0x00]
9.6.20
AC Load Diagnostic Control 2 Register (address = 0x16) [default = 0x00]
9.6.21
AC Load Diagnostic Impedance Report Ch1 through Ch4 Registers (address = 0x17–0x1A) [default = 0x00]
9.6.22
AC Load Diagnostic Phase Report High Register (address = 0x1B) [default = 0x00]
9.6.23
AC Load Diagnostic Phase Report Low Register (address = 0x1C) [default = 0x00]
9.6.24
AC Load Diagnostic STI Report High Register (address = 0x1D) [default = 0x00]
9.6.25
AC Load Diagnostic STI Report Low Register (address = 0x1E) [default = 0x00]
9.6.26
Miscellaneous Control 3 Register (address = 0x21) [default = 0x00]
9.6.27
Clip Control Register (address = 0x22) [default = 0x01]
9.6.28
Clip Window Register (address = 0x23) [default = 0x14]
9.6.29
Clip Warning Register (address = 0x24) [default = 0x00]
9.6.30
ILIMIT Status Register (address = 0x25) [default = 0x00]
9.6.31
Miscellaneous Control 4 Register (address = 0x26) [default = 0x40]
10
Application Information Disclaimer
10.1
Application Information
10.1.1
AM-Radio Band Avoidance
10.1.2
Parallel BTL Operation (PBTL)
10.1.3
Demodulation Filter Design
10.1.4
Line Driver Applications
10.2
Typical Applications
10.2.1
BTL Application
10.2.1.1
Design Requirements
10.2.1.1.1
Communication
10.2.1.2
Detailed Design Procedure
10.2.1.2.1
Hardware Design
10.2.1.2.2
Digital Input and the Serial Audio Port
10.2.1.2.3
Bootstrap Capacitors
10.2.1.2.4
Output Reconstruction Filter
10.2.2
PBTL Application
10.2.2.1
Design Requirements
10.2.2.1.1
Detailed Design Procedure
11
Power Supply Recommendations
12
Layout
12.1
Layout Guidelines
12.2
Layout Example
12.3
Thermal Considerations
13
Device and Documentation Support
13.1
Documentation Support
13.2
Related Documentation
13.3
Receiving Notification of Documentation Updates
13.4
サポート・リソース
13.5
商標
13.6
静電気放電に関する注意事項
13.7
用語集
14
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DKQ|56
MPDS378A
サーマルパッド・メカニカル・データ
DKQ|56
PPTD313D
発注情報
jajskd3_oa
jajskd3_pm
1
特長
車載アプリケーション向けに AEC-Q100 認証済み
温度グレード 1:–40℃~125℃、T
A
高度な負荷診断機能
DC 診断を入力クロックなしで実行
インピーダンスおよび位相応答を使った AC 診断によるツイータ検出
CISPR25-L5 EMC 仕様に容易に適合
オーディオ入力
4 チャネルの I
2
S または 4/8 チャネルの TDM 入力
入力サンプル・レート:44.1kHz、48kHz、96kHz
入力フォーマット:16 ビットから 32 ビットの I
2
S および TDM
オーディオ出力
4 チャネルのブリッジ結合負荷 (BTL)
2 チャネルのパラレル BTL (PBTL)
最高 2.1MHz の出力スイッチング周波数
27W (10% THD、14.4V BTL、4Ω 負荷)
45W (10% THD、14.4V BTL、2Ω 負荷)
80W (10% THD、18V PBTL、2Ω 負荷)
14.4V BTL、4Ω 負荷でのオーディオ性能
THD+N < 0.02% (1W)
出力ノイズ:42µV
RMS
クロストーク:–90dB
負荷診断
出力負荷の開路と短絡
出力からバッテリまたはグランドへの短絡
最大 6kΩ のライン出力検出
ホストと独立の動作
保護
出力電流制限および短絡保護
40V の負荷ダンプ
グランド・オープン / 電源オープンへの耐性
DC オフセット
過熱
低電圧および過電圧
一般的な動作
4.5V~18V の電源電圧
4 つのアドレス・オプションを持つ I
2
C 制御
ラッチ付きおよびラッチなしクリップ検出