JAJSKD3 november 2020 TAS6424MS-Q1
PRODUCTION DATA
The FAULT pin reports faults and is active low under any of the following conditions:
The register reports for all fault reports remain asserted until they are cleared by writing the CLEAR FAULT bit (bit 7) in register 0x21.
Register bits are available to mask fault categories from reporting to the FAULT pin. These bits only mask the setting of the pin and do not affect the register reporting or protection of the device. By default all faults are reported to the pin. See the Register Maps section for a description of the mask settings.
This pin is an open-drain output with an internal 100 kΩ pull-up resistor to VDD.