JAJSNE4B December   2022  – November 2023 TCA39416

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Switching Characteristics
    8. 5.8 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 Voltage Waveforms
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Architecture
      2. 7.3.2 Enable and Disable
      3. 7.3.3 Pull up resistors on I/O Lines
      4. 7.3.4 Input Driver Requirements
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.3 Power Supply Recommendations

The TCA39416 has no supply restrictions outside of the 0.72 V to 1.98 V range. VCCA must be ≤ VCCB for proper operation.

The sequencing of each power supply does not damage the device during the power up operation, so either power supply can be ramped up first. The output-enable (OE) input circuit is designed so that when the (OE) input is low, the outputs are disabled. No signals may propagate the rise time and fall time accelerators, and the internal pull up resistors are disabled. To make sure the signals do not pass through during power up or power down, the OE input pin must be tied to GND through a pull down resistor. The OE input pin should not be enabled until VCCA and VCCB are fully ramped and stable. If OE is tied to VCCA, this is OK, but might result in a glitch on the bus during power up depending on the capacitive load and ramp rates. The minimum value of the pull down resistor to ground is determined by the current-sourcing capability of the driver.