JAJSHZ2C
January 2014 – September 2019
TCA5013
PRODUCTION DATA.
1
特長
2
アプリケーション
3
概要
Device Images
概略回路図
4
改訂履歴
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
Handling Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics—Power Supply and ESD
6.6
Electrical Characteristics—Card VCC
6.7
Electrical Characteristics—Card RST
6.8
Electrical Characteristics—Card CLK
6.9
Electrical Characteristics—Card Interface IO, C4 and C8
6.10
Electrical Characteristics—PRES
6.11
Electrical Characteristics—IOMC1 and IOMC2
6.12
Electrical Characteristics—CLKIN1 and CLKIN2
6.13
Electrical Characteristics—A0 and SHDN
6.14
Electrical Characteristics—INT
6.15
Electrical Characteristics—GPIO
6.16
Electrical Characteristics—SDA and SCL
6.17
Electrical Characteristics—Fault Condition Detection
6.18
I2C Interface Timing Requirements
6.19
I2C Interface Timing Characteristics
6.20
Synchronous Type 1 Card Activation Timing Characteristics
6.21
Synchronous Type 2 Card Activation Timing Characteristics
6.22
Card Deactivation Timing Characteristics
6.23
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Card Interface Modules
8.3.2
SAM Card Interface Modules
8.3.3
User Card Interface Module
8.3.4
Clock Division and Multiplexing
8.3.5
IO Multiplexing
8.3.6
GPIO Operation
8.3.7
Power Management Features
8.3.8
ESD Protection
8.3.9
I2C interface
8.4
Device Functional Modes
8.4.1
Power Off Mode
8.4.2
Shutdown Mode
8.4.3
Standby Mode
8.4.4
Active Mode
8.4.4.1
User Card Operating Mode Selection
8.4.4.2
Synchronous Type 1 Operating Mode
8.4.4.3
Synchronous Type 2 Operating Mode
8.4.4.4
Manual Operating Mode
8.4.4.5
Asynchronous Operating Mode
8.4.4.6
Warm Reset Sequence
8.4.4.7
Deactivation Sequence
8.4.5
User Card Insertion / Removal Detection
8.4.6
IO Operation
8.4.6.1
IO Switching Control
8.4.6.2
IO Rise Time and Fall Time control
8.4.6.3
Current Limiting on IO Pin
8.4.7
CLK Operation
8.4.7.1
CLK Switching
8.4.7.2
CLK Rise Time and Fall Time Control
8.4.7.3
Current Limiting On CLK Pin
8.4.8
RST Operation
8.4.8.1
Current Limiting On RST
8.4.9
Interrupt Operation
8.4.9.1
Card Insertion And Removal
8.4.9.2
Over Current Fault
8.4.9.3
Supervisor Fault
8.4.9.4
Over Temperature Fault
8.4.9.5
EARLY Fault
8.4.9.6
MUTE Fault
8.4.9.7
Synchronous Activation Complete
8.4.9.8
VCC Ramp Fault
8.4.9.9
GPIO Input State Transition
8.4.9.10
POR Interrupt
8.4.10
Power Management
8.4.10.1
Voltage Supervisor
8.4.10.2
DC-DC Boost
8.4.10.3
LDOs and Load Transient Response
8.5
Programming
8.5.1
I2C Interface Operation
8.5.1.1
I2C Read and Write Procedures
8.5.1.2
I2C Address Configuration
8.6
Register Maps
8.6.1
Memory Map
Table 12.
91
Table 13.
92
Table 14.
93
Table 15.
94
Table 16.
95
Table 17.
96
Table 18.
97
Table 19.
98
Table 20.
99
Table 21.
100
Table 22.
101
Table 23.
102
Table 24.
103
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
IO Pin Fall Time Setting
9.2.2.2
CLK Pin Rise Time And Fall Time Settings
9.2.3
Application Curves
10
Power Supply Recommendations
10.1
Power-On-Reset
11
Layout
11.1
Layout Guidelines
11.1.1
DC-DC Boost Layout Recommendation
11.1.2
Card Interface Layout Recommendations
11.2
Layout Example
12
デバイスおよびドキュメントのサポート
12.1
商標
12.2
静電気放電に関する注意事項
12.3
Glossary
13
メカニカル、パッケージ、および注文情報
パッケージ・オプション
メカニカル・データ（パッケージ｜ピン）
ZAH|48
MPBG679B
サーマルパッド・メカニカル・データ
発注情報
jajshz2c_oa
jajshz2c_pm
6.19
I
2
C Interface Timing Characteristics
(1)
PARAMETER
MIN
TYP
MAX
UNIT
t
vd(data)
Valid data time; SCL low to SDA output valid
450
ns
t
vd(ack)
Valid data time of ACK condition; ACK signal from SCL low to SDA (out) low
450
ns
(1)
Refer to
Parameter Measurement Information
section for more information.