JAJSFN6G September   2009  – June 2018 TCA8418

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     Device Images
      1.      概略回路図
  4. 改訂履歴
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  I2C Interface Timing Requirements
    7. 6.7  Reset Timing Requirements
    8. 6.8  Switching Characteristics
    9. 6.9  Keypad Switching Characteristics
    10. 6.10 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Key Events
        1. 8.3.1.1 Key Event Table
        2. 8.3.1.2 General Purpose Input (GPI) Events
        3. 8.3.1.3 Key Event (FIFO) Reading
        4. 8.3.1.4 Key Event Overflow
      2. 8.3.2 Keypad Lock/Unlock
      3. 8.3.3 Keypad Lock Interrupt Mask Timer
      4. 8.3.4 Control-Alt-Delete Support
      5. 8.3.5 Interrupt Output
        1. 8.3.5.1 50 Micro-second Interrupt Configuration
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-On Reset (POR)
      2. 8.4.2 Powered (Key Scan Mode)
        1. 8.4.2.1 Idle Key Scan Mode
        2. 8.4.2.2 Active Key Scan Mode
    5. 8.5 Programming
      1. 8.5.1 I2C Interface
      2. 8.5.2 Bus Transactions
        1. 8.5.2.1 Writes
        2. 8.5.2.2 Reads
    6. 8.6 Register Maps
      1. 8.6.1 Device Address
      2. 8.6.2 Control Register and Command Byte
        1. 8.6.2.1  Configuration Register (Address 0x01)
        2. 8.6.2.2  Interrupt Status Register, INT_STAT (Address 0x02)
        3. 8.6.2.3  Key Lock and Event Counter Register, KEY_LCK_EC (Address 0x03)
        4. 8.6.2.4  Key Event Registers (FIFO), KEY_EVENT_A–J (Address 0x04–0x0D)
        5. 8.6.2.5  Keypad Lock1 to Lock2 Timer Register, KP_LCK_TIMER (Address 0x0E)
        6. 8.6.2.6  Unlock1 and Unlock2 Registers, UNLOCK1/2 (Address 0x0F-0x10)
        7. 8.6.2.7  GPIO Interrupt Status Registers, GPIO_INT_STAT1–3 (Address 0x11–0x13)
        8. 8.6.2.8  GPIO Data Status Registers, GPIO_DAT_STAT1–3 (Address 0x14–0x16)
        9. 8.6.2.9  GPIO Data Out Registers, GPIO_DAT_OUT1–3 (Address 0x17–0x19)
        10. 8.6.2.10 GPIO Interrupt Enable Registers, GPIO_INT_EN1–3 (Address 0x1A–0x1C)
        11. 8.6.2.11 Keypad or GPIO Selection Registers, KP_GPIO1–3 (Address 0x1D–0x1F)
        12. 8.6.2.12 GPI Event Mode Registers, GPI_EM1–3 (Address 0x20–0x22)
        13. 8.6.2.13 GPIO Data Direction Registers, GPIO_DIR1–3 (Address 0x23–0x25)
        14. 8.6.2.14 GPIO Edge/Level Detect Registers, GPIO_INT_LVL1–3 (Address 0x26–0x28)
        15. 8.6.2.15 Debounce Disable Registers, DEBOUNCE_DIS1–3 (Address 0x29–0x2B)
        16. 8.6.2.16 GPIO pull-up Disable Register, GPIO_PULL1–3 (Address 0x2C–0x2E)
      3. 8.6.3 CAD Interrupt Errata
        1. 8.6.3.1 Description
        2. 8.6.3.2 System Impact
        3. 8.6.3.3 System Workaround
      4. 8.6.4 Overflow Errata
        1. 8.6.4.1 Description
        2. 8.6.4.2 System Impact
        3. 8.6.4.3 System Workaround
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Ghosting Considerations
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Designing the Hardware Layout
        2. 9.2.2.2 Configuring the Registers
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントの更新通知を受け取る方法
    2. 12.2 コミュニティ・リソース
    3. 12.3 商標
    4. 12.4 静電気放電に関する注意事項
    5. 12.5 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Key Event (FIFO) Reading

The TCA8418 has a 10-byte event FIFO, which stores any key presses or releases which have been configured to be added to the Key Event Table. All ROWs and COLs added to the keypad matrix via the KP_GPIO1-3 Registers will have any key pad events added to the FIFO. Any GPIs configured with a 1 in the GPI_EM1-3 Registers will also be part of the event FIFO.

When the host wishes to read the FIFO, the following procedure is recommended.

  1. Read the INT_STAT (0x02) register to determine what asserted the INT line. If GPI_INT or K_INT is set, then a key event has occurred, and the event is stored in the FIFO.
  2. Read the KEY_LCK_EC (0x03) register, bits [3:0] to see how many events are stored in FIFO.
  3. Read the KEY_EVENT_A (0x04) register. Bit 7 value '0' signifies key release, value 1 signifies key press. Bits [6:0] state which key was pressed with respect to the Key Event Table. With each read of the key event register, the event counter in KEY_LCK_EC[3:0] will decrease by 1, and the FIFO will shift the events down 1 register.
  4. Repeat step 3 until either KEY_LCK_EC[3:0] = 0 or KEY_EVENT_A = 0. This signifies that the FIFO is empty.
  5. Reset the INT_STAT interrupt flag which was causing the interrupt by writing a 1 to the specific bit.

As an example, consider the following key presses.

Table 4. Example Key Sequence

Event # Key (Decimal Value) Press/Release
1 1 Press
2 32 Press
3 1 Release
4 32 Release
5 23 Press
6 23 Release
7 45 Press
8 41 Press
9 41 Release
10 45 Release

If this example key sequence occurs, then while performing the recommended read procedure listed above, the host would see the following information. Information at the top of the list is of an initial read to the KEY_LCK_EC[3:0] register.

Table 5. Example Key Sequence

KEY_LCK_EC[3:0] Value KEY_EVENT_A Value (Binary/Hex) Key (Decimal Value) Press/Release
10 N/A N/A N/A
9 1 000 0001 (0x81) 1 Press
8 1 010 0000 (0xA0) 32 Press
7 0 000 0001 (0x01) 1 Release
6 0 010 0000 (0x20) 32 Release
5 1 001 0111 (0x97) 23 Press
4 0 001 0111 (0x17) 23 Release
3 1 010 1101 (0xAD) 45 Press
2 1 010 1001 (0xA9) 41 Press
1 0 010 1001 (0x29) 41 Release
0 0 010 1101 (0x2D) 45 Release

(1)

Note that the MSB of the KEY_EVENT_A value signifies a key press or release. MSB Bit = 1 signifies a key press; MSB Bit = 0 signifies a key release