JAJSHE4C
may 2019 – june 2023
TCA9548A-Q1
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
I2C Interface Timing Requirements
6.7
Reset Timing Requirements
6.8
Switching Characteristics
6.9
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.4
Device Functional Modes
8.4.1
RESET Input
8.4.2
Power-On Reset
8.5
Programming
8.5.1
I2C Interface
8.5.2
Device Address
8.5.3
Bus Transactions
8.5.3.1
Writes
8.5.3.2
Reads
8.5.4
Control Register
8.5.5
RESET Input
8.5.6
Power-On Reset
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curves
Power Supply Recommendations
9.1
Power-On Reset Requirements
9
Layout
9.1
Layout Guidelines
9.2
Layout Example
10
Device and Documentation Support
10.1
Documentation Support
10.1.1
Related Documentation
10.2
ドキュメントの更新通知を受け取る方法
10.3
サポート・リソース
10.4
商標
10.5
静電気放電に関する注意事項
10.6
用語集
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
RGE|24
MPQF124G
サーマルパッド・メカニカル・データ
RGE|24
QFND136Y
発注情報
jajshe4c_oa
jajshe4c_pm
8
Detailed Description