JAJSND9A May   2021  – November 2021 TCAN11623-Q1 , TCAN11625-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 概要 (続き)
  6. 6 Pin Configurations and Functions (TCAN11625)
  7. 7 Pin Configurations and Functions (TCAN11623)
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 ESD Ratings IEC Specification
    4. 8.4 Recomended Operating Conditions
    5. 8.5 Thermal Information
    6. 8.6 Power Supply Characteristics
    7. 8.7 Electrical Characteristics
    8. 8.8 Switching Characteristics
    9. 8.9 Typical Characteristics
  9. 9 Parameter Measurement Information
  10. 10Detailed Description
    1. 10.1 Overview
    2. 10.2 Functional Block Diagram
    3. 10.3 Feature Description
      1. 10.3.1  VSUP Pin
      2. 10.3.2  VCCOUT Pin
      3. 10.3.3  VFLT Pin
      4. 10.3.4  VLDO3 Pin
      5. 10.3.5  Digital Inputs and Outputs
        1. 10.3.5.1 TXD Pin
        2. 10.3.5.2 RXD Pin
        3. 10.3.5.3 TS Pin
      6. 10.3.6  Digital Control and Timing
      7. 10.3.7  VIO Pin
      8. 10.3.8  GND
      9. 10.3.9  INH Pin
      10. 10.3.10 WAKE Pin
      11. 10.3.11 nRST Pin
      12. 10.3.12 CAN Bus Pins
      13. 10.3.13 Local Faults
        1. 10.3.13.1 TXD Dominant Timeout (TXD DTO)
        2. 10.3.13.2 Thermal Shutdown (TSD)
        3. 10.3.13.3 Under/Over Voltage Lockout
        4. 10.3.13.4 Unpowered Devices
        5. 10.3.13.5 Floating Terminals
        6. 10.3.13.6 CAN Bus Short Circuit Current Limiting
        7. 10.3.13.7 Sleep Wake Error Timer
    4. 10.4 Device Functional Modes
      1. 10.4.1 Operating Mode Description
        1. 10.4.1.1 Normal Mode
        2. 10.4.1.2 Standby Mode
        3. 10.4.1.3 Sleep Mode
          1. 10.4.1.3.1 Remote Wake Request via Wake-Up Pattern (WUP)
          2. 10.4.1.3.2 Local Wake-Up (LWU) via WAKE Input Terminal
        4. 10.4.1.4 Reset Mode
        5. 10.4.1.5 Fail-safe Mode
      2. 10.4.2 CAN Transceiver
        1. 10.4.2.1 CAN Transceiver Operation
        2. 10.4.2.2 CAN Transceiver Modes
          1. 10.4.2.2.1 CAN Off Mode
          2. 10.4.2.2.2 CAN Autonomous: Inactive and Active
          3. 10.4.2.2.3 CAN Active
        3. 10.4.2.3 Driver and Receiver Function Tables
        4. 10.4.2.4 CAN Bus States
  11. 11Application Information
    1. 11.1 Application Information Disclaimer
    2. 11.2 Typical Application
      1. 11.2.1 Design Requirements
        1. 11.2.1.1 Bus Loading, Length and Number of Nodes
      2. 11.2.2 Detailed Design Procedures
        1. 11.2.2.1 CAN Termination
    3. 11.3 Application Curves
  12. 12Power Supply Requirements
  13. 13Layout
    1. 13.1 Layout Guidelines
    2. 13.2 Layout Example
  14. 14Device and Documentation Support
    1. 14.1 Documentation Support
      1. 14.1.1 Related Documentation
    2. 14.2 Receiving Notification of Documentation Updates
    3. 14.3 サポート・リソース
    4. 14.4 Trademarks
    5. 14.5 Electrostatic Discharge Caution
    6. 14.6 Glossary
  15. 15Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.6 Power Supply Characteristics

Over recomended operating conditions with TJ = -40°C to 150°C, unless otherwise noted. All typical values are taken at 25°C, VSUP = 12 V, VIO = 3.3 V and RL = 60 Ω
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Supply Voltage and Current
ISUP Supply current
Bus biasing active: dominant
Transceiver only		 TXD = 0 V, RL = 60 Ω, CL = open
See Figure 9-2		 60 mA
TXD = 0 V, RL = 50 Ω, CL = open
See Figure 9-2		 70 mA
Supply current
Bus biasing active: recessive
Transceiver only		 TXD = VIO, RL = 50 Ω, CL = open
See Figure 9-2		 3 mA
ISUP(STB) Supply current TCAN11623
Standby mode
Bus biasing autonomous: inactive		 5.5 V < VSUP ≤ 19 V
See Figure 9-2		 255 µA
ISUP(STB) Supply current TCAN11625
Standby mode
Bus bias autonomous: inactive		 5.5 V < VSUP ≤ 19 V
See Figure 9-2		 150 µA
ISUP(SLP) Supply current
Sleep mode
Bus bias autonomous: inactive		 nSLP = 0 V, 5.5 V < VSUP ≤ 19 V
TA > 85℃
See Figure 9-2		 50 µA
ISUP(SLP) Supply current
Sleep mode
Bus bias autonomous: inactive		 nSLP = 0 V, 5.5 V < VSUP ≤ 19 V
TA ≤ 85℃
See Figure 9-2		 40 µA
ISUP(BIAS) Supply current
Bus bias autonomous: active(1)		 5.5 V < VSUP ≤ 28 V
See Figure 9-2		 60 µA
UVSUPR Under voltage VSUP threshold rising Ramp Up 4.05 4.42 V
UVSUPF Under voltage VSUP threshold falling Ramp Down 3.9 4.25 V
IIO IO Supply Current
Normal mode		 RXD floating, TXD = 0 V 150 µA
IIO IO Supply Current - TCAN11625
Normal, or Standby		 RXD floating, TXD = VIO 12 µA
IIO IO Supply Current - TCAN11623
Normal, or Standby		 RXD floating, TXD = VIO 12.5 µA
IIO IO Supply Current
Sleep mode (TJ ≤ 125℃)		 nSLP = 0 V 10 µA
UVIOR Under voltage VIO threshold rising Ramp Up 1.4 1.65 V
UVIOF Under voltage VIO threshold falling Ramp Down 1 1.25 V
VHYS(UVIO) Hysteresis voltage on UVVIO 40 80 160 mV
VFLT/VLDO3VCCOUT Characteristics
VFLT CAN regulator filter pin VSUP = 5.5 to 28 V 4.9 5.1 V
VCCOUT 5 V regulated output VSUP = 5.5 to 18 V
IL = 0 to 100 mA
TXD = VIO		 4.9 5.1 V
VCCOUT 5 V regulated output VSUP = 5.65 to 18 V
IL = 0 to 175 mA
TXD = VIO		 4.9 5.1 V
VCCOUT 5 V regulated output VSUP = 5.65 to 18 V
IL = 0 to 100 mA
TXD = 0 V; VCANH = 0 V		 4.9 5.1 V
VCCOUT_DROP Dropout voltage 5 V LDO, VSUP – VCCOUT, IL = 125 mA 300 650 mV
VLDO3 3.3 V regulated output VSUP = 5.5 to 18 V
ILDO = 0 to 70 mA
TXD = 0 V; VCANH = 0 V		 3.2 3.4 V
∆VLDO3(∆VSUP) Line regulation VSUP = 5.5 to 28 V, ΔVLDO, ILDO = 10 mA 50 mV
∆VCCOUT(∆VSUP) Line regulation VSUP = 5.5 to 28 V, IL = 10 mA, ΔVCCOUT 50 mV
∆VLDO3(∆VSUPL) Load regulation ILDO = 1 to 70 mA, VSUP = 14 V, ΔVLDO 50 mV
∆VCCOUT(∆VSUPL) Load regulation IL = 1 to 125 mA, VSUP = 14 V, ΔVCCOUT 50 mV
UVFLTR Under voltage VFLT threshold rising Ramp Up 4.6 4.75 V
UVFLTF Under voltage VFLT threshold falling Ramp Down 4.2 4.45 V
UVVCCOUTR Under voltage VCCOUT threshold rising Ramp Up 4.6 4.75 V
UVVCCOUTF Under voltage VCCOUT threshold falling Ramp Down 4.2 4.45 V
UVLDO3R Under voltage VLDO3 threshold rising Ramp Up 2.9 3.1 V
UVLDO3F Under voltage VLDO3 threshold falling Ramp Down 2.5 2.75 V
OVFLTR Over voltage VFLT threshold rising Ramp Up 5.7 6.15 V
OVFLTF Over voltage VFLT threshold falling Ramp Down 5.47 5.65 V
OVCCOUTR Over voltage VCCOUT threshold rising Ramp Up 5.7 6.15 V
OVCCOUTF Over voltage VCCOUT threshold falling Ramp Down 5.47 5.65 V
OVLDO3R Over voltage VLDO3 threshold rising Ramp Up 3.8 3.93 V
OVLDO3F Over voltage VLDO3 threshold falling Ramp Down 3.6 3.7 V
IL_VCCOUT Output current limit VCCOUT short to ground 175 275 mA
IL_LDO3 Output current limit VLDO3 short to ground 90 160 mA
PSRRVCCOUT Power supply rejection ripple rejection VRIP = 0.5 VPP, Load = 10 mA, ƒ = 100 Hz, CO = 10 μF 60 dB
PSRRLDO3 Power supply rejection ripple rejection VRIP = 0.5 VPP, Load = 10 mA, ƒ = 100 Hz, CO = 4.7 μF 37 dB
(1) After a valid wake-up the total ISUP current is the sum of ISUP(STB) and ISUP(BIAS) (ISUP = ISUP(STB) + ISUP(BIAS))