JAJSNX3 February 2024 TCAN1465-Q1 , TCAN1469-Q1
ADVANCE INFORMATION
The TCAN146x-Q1 supports low power sleep and standby modes and uses a wake up from the CAN bus mechanism called bus wake via RXD Request (BWRR). Once this pattern is received, the TCAN146x-Q1 automatically switches to standby mode from sleep mode and inserts an interrupt onto the nINT pin, if enabled, to indicate to a host microprocessor that the bus is active, and the processor should wake up and service the TCAN146x-Q1. The low power receiver and bus monitor are enabled in sleep mode to allow for RXD Wake Requests via the CAN bus. A wake-up request is output to the RXD (driven low) as shown in Figure 8-13. The external CAN FD controller monitors RXD for transitions (high to low) and reactivates the device to normal mode based on the RXD Wake Request. The CAN bus terminals are weakly pulled to GND during this mode, prior to BWRR if tSILENCE is expired, see Figure 7-2.
This device uses the wake-up pattern (WUP) from ISO 11898-2: 2024 Annex A to qualify bus traffic into a request to wake the host microprocessor. The bus wake request is signaled to the integrated CAN FD controller by a falling edge and low on the RXD terminal (BWRR).
The wake-up pattern (WUP) consists of
Once the WUP is detected, the device starts issuing wake up requests (BWRR) on the RXD pin. The behavior of this pin is determined by register 8h'12[2]. If 8h'12[2] = 0b the RXD pin is pulled low once the WUP pattern has been received that meets the dominant, recessive, dominant, recessive filtered times and VIO ≥ UVIO and VCC ≥ UVCC. For cases where VIO is present or requiring VCC ≥ UVCC not needed, the VCC ≥ UVCC requirement can be disabled by setting VCC_DIS at 8'h4B[0] = 1b. The first filtered dominant initiates the WUP and the bus monitor is now waiting on a filtered recessive; other bus traffic does not reset the bus monitor. Once a filtered recessive is received, the bus monitor is now waiting on a second filtered dominant and again, other bus traffic does not reset the bus monitor. Once the second filtered dominat is received, the bus monitor is now waiting on a second filtered recessive and again, other bus traffic does not reset the bus monitor. Immediately upon receiving of the second filtered recessive the bus monitor recognizes the WUP and transition to BWRR output.
For a dominant or recessive to be considered “filtered”, the bus must be in that state for more than tWK_FILTER time. Due to variability in the tWK_FILTER the following scenarios are applicable.
See Figure 8-13 for the timing diagram of the WUP.
The pattern and tWK_FILTER time used for the WUP and BWRR prevents noise and a bus stuck dominant fault from causing false wake requests while allowing any CAN or CAN FD message to initiate a BWRR. If the device is switched to normal mode or an under voltage event occurs on VCC the BWRR is lost. The WUP pattern must take place within the tWK_TIMEOUT time; otherwise, the device is in a state waiting for the next recessive and then a valid WUP pattern.
If 8h'12[2] = 1b, the RXD pin toggles low to high to low for tTOGGLE = 10µs until the device is put into normal or listen mode. BWRR is active in standby mode upon power up and once coming out of sleep mode or certain fail-safe mode conditions. If a SPI write puts the device into standby mode, the RXD pin is high until a wake event takes place. The RXD pin then behaves like it would when waking up from sleep mode.