SPRSP96A March 2024 – September 2024 TDA4AEN-Q1 , TDA4VEN-Q1
PRODUCTION DATA
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
For more information, see the Camera Serial Interface Receiver (CSI_RX_IF) section in the device TRM. The CSI_RX_IF is connected to device port instances named CSIRXn, where n is the instance number.
The CSI_RX_IF and associated D-PHY implements a CSI-2 port (CSIRX0) compliant with the MIPI D-PHY specification v1.2 and the MIPI CSI-2 specification v1.3, with 4 differential data lanes plus 1 differential clock lane operating in synchronous double data rate mode. For CSI-2 timing details, see the respective MIPI specifications mentioned above.