JAJSPG4K
september 2003 – april 2023
THS3091
,
THS3095
PRODUCTION DATA
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Device Comparison Table
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics: VS = ±15 V
7.6
Electrical Characteristics: VS = ±5 V
7.7
Typical Characteristics: ±15 V
7.8
Typical Characteristics: ±5 V
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Power-Down and Reference Pins Functionality
8.4
Device Functional Modes
8.4.1
Wideband, Noninverting Operation
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curves
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.1.1
PowerPAD Design Considerations
9.4.1.1.1
PowerPAD Layout Considerations
9.4.1.2
Power Dissipation and Thermal Considerations
9.4.2
Layout Example
10
Device and Documentation Support
10.1
Device Support
10.1.1
Development Support
10.2
Documentation Support
10.2.1
Related Documentation
10.3
ドキュメントの更新通知を受け取る方法
10.4
サポート・リソース
10.5
Trademarks
10.6
静電気放電に関する注意事項
10.7
用語集
11
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
D|8
MSOI002K
DDA|8
MPDS092F
サーマルパッド・メカニカル・データ
DDA|8
PPTD058I
発注情報
jajspg4k_oa
jajspg4k_pm
9.4.2
Layout Example
Figure 9-8
Layout Recommendation
Figure 9-9
THS3091 EVM Circuit Configuration
Figure 9-10
THS3091 EVM Board Layout (Top Layer)
Figure 9-12
THS3091 EVM Board Layout (Bottom Layer)
Figure 9-11
THS3091 EVM Board Layout (Second and Third Layers)