SLOS823D December   2012  – March 2020 THS4531A

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     1-kHz FFT Plot on Audio Analyzer
  4. 4 Revision History
  5. 5 Related Products
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: VS = 2.7 V
    6. 7.6 Electrical Characteristics: VS = 5 V
    7. 7.7 Typical Characteristics
      1. 7.7.1 Typical Characteristics: VS = 2.7 V
      2. 7.7.2 Typical Characteristics: VS = 5 V
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Common-Mode Voltage Range
        1. 8.3.1.1 Setting the Output Common-Mode Voltage
      2. 8.3.2 Power Down
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1  Frequency Response, and Output Impedance
      2. 9.1.2  Distortion
      3. 9.1.3  Slew Rate, Transient Response, Settling Time, Overdrive, Output Voltage, and Turnon and Turnoff Time
      4. 9.1.4  Common-Mode and Power Supply Rejection
      5. 9.1.5  VOCM Input
      6. 9.1.6  Balance Error
      7. 9.1.7  Single-Supply Operation
      8. 9.1.8  Low-Power Applications and the Effects of Resistor Values on Bandwidth
      9. 9.1.9  Driving Capacitive Loads
      10. 9.1.10 Audio Performance
      11. 9.1.11 Audio On and Off Pop Performance
    2. 9.2 Typical Applications
      1. 9.2.1 SAR ADC Performance: THS4531A and ADS8321 Combined Performance
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Audio ADC Driver Performance: THS4531A and PCM4204 Combined Performance
        1. 9.2.2.1 Detailed Design Procedure
        2. 9.2.2.2 Application Curves
      3. 9.2.3 SAR ADC Performance: THS4531A and ADS7945 Combined Performance
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
        3. 9.2.3.3 Application Curve
      4. 9.2.4 Differential-Input to Differential-Output Amplifier
        1. 9.2.4.1 AC-Coupled, Differential-Input to Differential-Output Design Issues
      5. 9.2.5 Single-Ended to Differential FDA Configuration
        1. 9.2.5.1 Input Impedance
      6. 9.2.6 Single-Ended Input to Differential Output Amplifier
        1. 9.2.6.1 AC-Coupled Signal Path Considerations for Single-Ended Input to Differential Output Conversion
        2. 9.2.6.2 DC-Coupled Input Signal Path Considerations for Single-Ended to Differential Conversion
        3. 9.2.6.3 Resistor Design Equations for the Single-Ended to Differential Configuration of the FDA
      7. 9.2.7 Differential Input to Single-Ended Output Amplifier
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Documentation Support
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ

5 Related Products

Table 1. Related Amplifiers

DEVICE BW (MHz) IQ (mA) THD (dBc) at 100 kHz VN (nV/√Hz) RAIL-TO-RAIL DUAL PART NUMBERS
THS4531A 36 0.25 –104 10 Negative In, Out THS4532
THS4121 100 16 –79 5.4 Out
THS4521 145 1.14 –120 4.6 Negative In, Out THS4522
THS4131 150 16 –107 1.3 No
THS4520 620 14.2 –107 2 Out
THS4541 850 10.1 –137 2.2 Negative In, Out

Table 2. Related Precision ADCs

DEVICE BITS MAX DATA RATE
(kSPS)		 NOMINAL SUPPLY (V) NOMINAL ICC (mA)
MAX CLK RATE		 TYPICAL POWER (mW)
MAX CLK RATE
ADS8881 18 1000 5 1.1 5.5
ADS8861 16 1000 3.3 1.67 5.3
ADS8321E 16 100 5 0.9 4.5
ADS7945 14 2000 5 2.32 5.8/ch (dual)
ADS7044 12 1000 3 0.3 0.9