JAJSC60F April   2016  – June 2024 THS6212

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics VS = 12 V
    6. 5.6 Electrical Characteristics VS = 28 V
    7. 5.7 Timing Requirements
    8. 5.8 Typical Characteristics: VS = 12 V
    9. 5.9 Typical Characteristics: VS = 28 V
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Output Voltage and Current Drive
      2. 6.3.2 Driving Capacitive Loads
      3. 6.3.3 Distortion Performance
      4. 6.3.4 Differential Noise Performance
      5. 6.3.5 DC Accuracy and Offset Control
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Wideband Current-Feedback Operation
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curves
      2. 7.2.2 Dual-Supply Downstream Driver
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
          1. 7.2.2.2.1 Line Driver Headroom Requirements
          2. 7.2.2.2.2 Computing Total Driver Power for Line-Driving Applications
    3. 7.3 Best Design Practices
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 ドキュメントの更新通知を受け取る方法
    3. 8.3 サポート・リソース
    4. 8.4 Trademarks
    5. 8.5 静電気放電に関する注意事項
    6. 8.6 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • RHF|24
サーマルパッド・メカニカル・データ
発注情報

4 Pin Configuration and Functions

THS6212 RHF Package, 24-Pin VQFN With Exposed Thermal Pad (Top View) Figure 4-1 RHF Package, 24-Pin VQFN With Exposed Thermal Pad (Top View)
Table 4-1 Pin Functions(1)
PIN TYPE DESCRIPTION
NAME NO.
BIAS-1 23 Input Bias mode parallel control, LSB
BIAS-2 24 Input Bias mode parallel control, MSB
D1_FB 19 Input Amplifier D1 inverting input
D2_FB 18 Input Amplifier D2 inverting input
D1_IN+ 1 Input Amplifier D1 noninverting input
D2_IN+ 2 Input Amplifier D2 noninverting input
D1_OUT 20 Output Amplifier D1 output
D2_OUT 17 Output Amplifier D2 output
GND(2) 3 Input/Output Control pin ground reference
IADJ 4 Input/Output Bias current adjustment pin
NC 5-16 — No internal connection
VS– 22 Input/Output Negative power-supply connection
VS+ 21 Input/Output Positive power-supply connection
(1) The THS6212 defaults to the shutdown (disable) state if a signal is not present on the bias pins.
(2) The GND pin ranges from VS– to (VS+ – 5 V).