JAJSHU7F
August 2019 – December 2024
THS6222
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics VS = 12 V
5.6
Electrical Characteristics VS = 32 V
5.7
Timing Requirements
5.8
Typical Characteristics: VS = 12 V
5.9
Typical Characteristics: VS = 32 V
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
Common-Mode Buffer
6.3.2
Thermal Protection and Package Power Dissipation
6.3.3
Output Voltage and Current Drive
6.3.4
Breakdown Supply Voltage
6.3.5
Surge Test Results
6.4
Device Functional Modes
7
Application and Implementation
7.1
Application Information
7.2
Typical Applications
7.2.1
Broadband PLC Line Driving
7.2.1.1
Design Requirements
7.2.1.2
Detailed Design Procedure
7.2.1.3
Application Curve
7.3
Best Design Practices
7.3.1
Do
7.3.2
Do Not
7.4
Power Supply Recommendations
7.5
Layout
7.5.1
Layout Guidelines
7.5.1.1
Wafer and Die Information
7.5.2
Layout Examples
8
Device and Documentation Support
8.1
Development Support
8.2
Documentation Support
8.2.1
Related Documentation
8.3
ドキュメントの更新通知を受け取る方法
8.4
サポート・リソース
8.5
Trademarks
8.6
静電気放電に関する注意事項
8.7
用語集
9
Revision History
10
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
メカニカル・データ(パッケージ|ピン)
RGT|16
YS|0
RHF|24
サーマルパッド・メカニカル・データ
RGT|16
QFND098S
発注情報
jajshu7f_oa
jajshu7f_pm
7.5
Layout