JAJSJO7E December   2002  – August 2020 THS7530

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: Main Amplifier
    6. 6.6 Package Thermal Data
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Test Circuits
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Continually-Variable Gain Control
      2. 8.3.2 Common-Mode Voltage Control
      3. 8.3.3 Output Voltage Clamps
      4. 8.3.4 Power-Down Mode
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Examples
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
      2. 12.1.2 Development Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.5 Electrical Characteristics: Main Amplifier

VS+ = 5 V, VS– = 0 V, VOCM = 2.5 V, VICM = 2.5 V, VG- = 0 V, VG+ = 1 V (maximum gain), TA = 25°C, AC performance measured using the AC test circuit shown in Figure 7-1 (unless otherwise noted). DC performance is measured using the DC test circuit shown in Figure 7-2 (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
AC PERFORMANCE
Small-signal bandwidthAll gains, PIN = –45 dBm300MHz
Slew rate(1)1-VPP Step, 25% to 75%, minimum gain1250V/µs
Settling time to 1%(1)1-VPP Step, minimum gain11ns
Harmonic distortion, 2nd harmonicf = 32 MHz, VO(PP) = 1 V, RL(diff)= 400 Ω–65dBc
Harmonic distortion, 3rd harmonicf = 32 MHz, VO(PP) = 1 V, RL(diff)= 400 Ω–61dBc
Third-order intermodulation distortionPO = –10 dBm each tone, fC= 70 MHz,
200-kHz tone spacing		–62dBc
Third-order output intercept pointfC= 70 MHz, 200-kHz tone spacing21dBm
Noise figure (with input termination)Source impedance: 50 Ω9dB
Total input voltage noisef > 100 kHz1.1nV/√ Hz
DC PERFORMANCE—INPUTS
Input bias currentTA = 25°C2039µA
TA = –40°C to +85°C40
Input bias current offset<150pA
Minimum input voltageMinimum gain, TA = 25°C1.51.6V
Minimum gain, TA = –40°C to +85°C1.7
Maximum input voltageMinimum gain, TA = 25°C3.353.5V
Minimum gain, TA = –40°C to +85°C3.2
Common-mode rejection ratioTA = 25°C56114dB
TA = –40°C to +85°C44
Differential input impedance8.5 || 3kΩ || pF
DC PERFORMANCE—OUTPUTS
Output offset voltageAll gains, TA = 25°C±100±340mV
All gains, TA = –40°C to +85°C±480
Maximum output voltage highTA = 25°C3.2753.5V
TA = –40°C to +85°C3.25
Minimum output voltage lowTA = 25°C1.51.7V
TA = –40°C to +85°C1.8
Output currentTA = 25°C±16±37mA
TA = –40°C to +85°C±16
Output impedance15Ω
OUTPUT COMMON-MODE VOLTAGE CONTROL
Small-signal bandwidth32MHz
Gain1V/V
Common-mode offset voltageTA = 25°C4.512mV
TA = –40°C to +85°C13.8
Minimum input voltage1.75V
Maximum input voltage3.25V
Input impedance25 || 1kΩ || pF
Default voltage, with no connect2.5V
Input bias current<1µA
GAIN CONTROL
Gain control differential voltage rangeVG+0 to 1V
Minus gain control voltageVG– – VS––0.6 to 0.8V
Minimum gainVG+ = 0 V11.6dB
Maximum gainVG+ = 0.9 V46.5dB
Gain slopeVG+ = 0 V to 0.9 V38.8dB/V
Gain slope variationVG+ = 0 V to 0.9 V±1.5dB/V
Gain errorVG+ = 0 V to 0.15 V±4dB
VG+ = 0.15 V to 0.9 V±2.25
Gain control input bias current<1µA
Gain control input resistance40kΩ
Gain control bandwidthSmall signal –3 dB15MHz
VOLTAGE CLAMPING
Output voltages (VOUT±) relative to clamp voltages (VCL±)Device In voltage limiting mode, TA = 25°C±25±38mV
Device In voltage limiting mode, TA = –40°C to +85°C±60
Clamp voltage (VCL±) input resistanceDevice in voltage limiting mode3.3kΩ
Clamp voltage (VCL±) limitsVS– to VS+V
POWER SUPPLY
Specified operating voltageTA = 25°C55.5V
TA = –40°C to +85°C5.5
Maximum quiescent currentTA = 25°C4048mA
TA = –40°C to +85°C49
Power supply rejection (±PSRR)TA = 25°C7077dB
TA = –40°C to +85°C45
POWER DOWN
Enable voltage thresholdTTL low = shut down, TA = 25°C1.4V
TTL low = shut down,
TA = –40°C to +85°C		1
Disable voltage thresholdTTL high = normal operation, TA = 25°C1.4V
TTL high = normal operation,
TA = –40°C to +85°C		1.65
Power-down quiescent currentTA = 25°C0.350.4mA
TA = –40°C to +85°C0.45
Input current highTA = 25°C±9±16µA
TA = –40°C to +85°C±19
Input current lowTA = 25°C±109±116µA
TA = –40°C to +85°C±119
Input impedance50 || 1kΩ || pF
Turnon time delayMeasured to 50% quiescent current820ns
Turnoff time delayMeasured to 50% quiescent current500ns
Forward isolation in power down80dB
Input resistance in power down> 1MΩ
Output resistance in power down16kΩ
(1) Slew rate and settling time measured at amplifier output.