JAJSLR8B April 2021 – September 2021 THVD1439 , THVD1439V , THVD1449 , THVD1449V
PRODUCTION DATA
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
PIN | I/O | DESCRIPTION | ||
---|---|---|---|---|
NAME | THVD1439, THVD1449 | THVD1439 V,THVD1449V | ||
VIO | - | 1 | P | 1.8-V to 5-V supply for R, D, and RE/DE |
R | 1 | 2 | O | Receiver data output |
RE | 2 | - | I | Receiver enable, active low (2 MΩ internal pull-up) |
DE | 3 | - | I | Driver enable, active high |
DE/ RE | - | 3 | I | Driver enable (Active high), Receiver enable (Active Low). (2 MΩ internal pull-down) |
D | 4 | 4 | I | Driver data input |
GND | 5 | 5 | - | Device ground |
A | 6 | 6 | I/O | Bus I/O port, A (complementary to B) |
B | 7 | 7 | I/O | Bus I/O port, B (complementary to A) |
VCC | 8 | 8 | P | 3.3-V to 5-V supply for the device |