JAJSOB4A November   2023  – March 2024 THVD2412 , THVD2442

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  ESD Ratings [IEC]
    4. 5.4  Recommended Operating Conditions
    5. 5.5  Thermal Information
    6. 5.6  Power Dissipation
    7. 5.7  Electrical Characteristics
    8. 5.8  Switching Characteristics_250kbps
    9. 5.9  Switching Characteristics_20Mbps
    10. 5.10 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 ±70-V Fault Protection
      2. 7.3.2 Integrated IEC ESD and EFT Protection
      3. 7.3.3 Driver Overvoltage and Overcurrent Protection
      4. 7.3.4 Enhanced Receiver Noise Immunity
      5. 7.3.5 Receiver Fail-Safe Operation
      6. 7.3.6 Low-Power Shutdown Mode
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Data Rate and Bus Length
        2. 8.2.1.2 Stub Length
        3. 8.2.1.3 Bus Loading
        4. 8.2.1.4 Transient Protection
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 サード・パーティ製品に関する免責事項
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5.9 Switching Characteristics_20Mbps

20-Mbps (THVD2442) over recommended operating conditions. All typical values are at 25°C and supply voltage of VCC = 5 V, unless otherwise noted
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Driver
tr, tf Differential output rise/fall time RL = 54 Ω, CL = 50 pF
See Figure 6-3		 VCC = 3 to 3.6 V, Typical at 3.3 V 4 8 15 ns
VCC = 4.5 to 5.5 V, Typical at 5 V 4 7 15 ns
tPHL, tPLH Propagation delay VCC = 3 to 3.6 V, Typical at 3.3 V 6 15 30 ns
VCC = 4.5 to 5.5 V, Typical at 5 V 6 13 26 ns
tSK(P) Pulse skew, |tPHL – tPLH| VCC = 3 to 3.6 V, Typical at 3.3 V 1 3 ns
VCC = 4.5 to 5.5 V, Typical at 5 V 1 3 ns
tPHZ, tPLZ Disable time RE = X See Figure 6-4 and Figure 6-5 15 35 ns
tPZH, tPZL Enable time RE = 0 V 8 39 ns
RE = VCC 2 4.5 μs
tSHDN Time to shutdown RE = VCC 50 500 ns
Receiver
tr, tf Output rise/fall time CL = 15 pF See Figure 6-6 1.5 6 ns
tPHL, tPLH Propagation delay 40 57 ns
tSK(P) Pulse skew, |tPHL – tPLH| 5 ns
tPHZ, tPLZ Disable time DE = X See Figure 6-7 11 25 ns
tPZH(1),
tPZL(1)		 Enable time DE = VCC See Figure 6-7 55 82 ns
tPZH(2),
tPZL(2)		 Enable time DE = 0 V See Figure 6-8 1.5 4.5 μs
tD(OFS) Delay to enter fail-safe operation CL = 15 pF See Figure 6-9 7 11 18 μs
tD(FSO) Delay to exit fail-safe operation 22 25 50 ns
tSHDN Time to shutdown DE = 0 V See Figure 6-8 50 500 ns