JAJSQY1B August   2023  – April 2024 THVD4431

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  ESD Ratings [IEC]
    4. 5.4  Recommended Operating Conditions
    5. 5.5  Thermal Information
    6. 5.6  Power Dissipation
    7. 5.7  Electrical Characteristics
    8. 5.8  Switching Characteristics_RS-485_500kbps
    9. 5.9  Switching Characteristics_RS-485_20Mbps
    10. 5.10 Switching Characteristics, Driver_RS232
    11. 5.11 Switching Characteristics, Receiver_RS232
    12. 5.12 Switching Characteristics_MODE switching
    13. 5.13 Switching Characteristics_RS-485_Termination resistor
    14. 5.14 Switching Characteristics_Loopback mode
    15. 5.15 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Integrated IEC ESD and EFT Protection
      2. 7.3.2 Protection Features
      3. 7.3.3 RS-485 Receiver Fail-Safe Operation
      4. 7.3.4 Low-Power Shutdown Mode
      5. 7.3.5 On-chip Switchable Termination Resistor
      6. 7.3.6 Operational Data Rate
      7. 7.3.7 Diagnostic Loopback
      8. 7.3.8 Integrated Charge pump for RS-232
    4. 7.4 Device Functional Modes
      1. 7.4.1 RS-485 Functionality
      2. 7.4.2 RS-232 Functionality
      3. 7.4.3 Mode Control
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Data Rate and Bus Length for RS-485
        2. 8.2.1.2 Stub Length for RS-485 Network
        3. 8.2.1.3 Bus Loading for RS-485 Network
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 サード・パーティ製品に関する免責事項
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.4.2 RS-232 Functionality

In RS-232 mode, only way to disable driver is to go in shutdown mode by pulling SHDN pin low. A logic high at inputs for driver L3, L4 and L6 causes driver outputs R3, R4 and R6 to be driven low towards negative charge pump output V-. A logic low at inputs for driver L3, L4 and L6 causes driver outputs R3, R4 and R6 to be driven high towards positive charge pump output V+. If logic inputs are left floating due to the pull-up resistors on driver logic inputs, the driver outputs are driven low towards V-.

Table 7-6 is valid irrespective of the state of SLR pin.

Table 7-6 Driver Function Table
INPUT ENABLE OUTPUTS FUNCTION
L3, L4, L6 SHDN R3, R4, R6
H H Low (driven towards V-) Normal operation with inverting logic
L H H (Driven towards V+) Normal operation with inverting logic
X L High impedance TX and RX are disabled in shutdown mode
Open H Low (driven towards V-) Since pull-up on logic input pin, output driven low by default

For the RS-232 receiver, if the receiver bus inputs are above rising threshold VIT+, corresponding received logic output goes low. Also, if the receiver bus inputs are below falling threshold VIT-, corresponding received logic output goes high.

Table 7-7 is valid irrespective of the state of SLR pin.

Table 7-7 Receiver Function Table
RS-232 BUS INPUT LOGIC OUTPUT FUNCTION
VIRx (voltage on R1, R2, R5, R7 or R8) L1, L2, L5, L7, L8
VIT+ < VIRx L Normal operation with inverting logic
VIT- < VIRx < VIT+ ? Indeterminate bus state
VIRx < VIT- H Normal operation with inverting logic
X High impedance for SHDN = GND Receiver disabled in shutdown mode
Open-circuit bus H Fail-safe high output