JAJSQY1B August   2023  – April 2024 THVD4431

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  ESD Ratings [IEC]
    4. 5.4  Recommended Operating Conditions
    5. 5.5  Thermal Information
    6. 5.6  Power Dissipation
    7. 5.7  Electrical Characteristics
    8. 5.8  Switching Characteristics_RS-485_500kbps
    9. 5.9  Switching Characteristics_RS-485_20Mbps
    10. 5.10 Switching Characteristics, Driver_RS232
    11. 5.11 Switching Characteristics, Receiver_RS232
    12. 5.12 Switching Characteristics_MODE switching
    13. 5.13 Switching Characteristics_RS-485_Termination resistor
    14. 5.14 Switching Characteristics_Loopback mode
    15. 5.15 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Integrated IEC ESD and EFT Protection
      2. 7.3.2 Protection Features
      3. 7.3.3 RS-485 Receiver Fail-Safe Operation
      4. 7.3.4 Low-Power Shutdown Mode
      5. 7.3.5 On-chip Switchable Termination Resistor
      6. 7.3.6 Operational Data Rate
      7. 7.3.7 Diagnostic Loopback
      8. 7.3.8 Integrated Charge pump for RS-232
    4. 7.4 Device Functional Modes
      1. 7.4.1 RS-485 Functionality
      2. 7.4.2 RS-232 Functionality
      3. 7.4.3 Mode Control
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Data Rate and Bus Length for RS-485
        2. 8.2.1.2 Stub Length for RS-485 Network
        3. 8.2.1.3 Bus Loading for RS-485 Network
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 サード・パーティ製品に関する免責事項
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5.9 Switching Characteristics_RS-485_20Mbps

20-Mbps (SLR = GND) over recommended operating conditions. All typical values are at 25°C and supply voltage of VCC = 5 V, VIO = 3.3 V. (1) 
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Driver
tr, tf Differential output rise/fall time RL = 54 Ω, CL = 50 pF
See Figure 6-3
 VCC = 3 to 3.6 V, Typical at 3.3 V 5 10 15 ns
VCC = 4.5 to 5.5 V, Typical at 5 V 5 10 15 ns
tPHL, tPLH Propagation delay VIO = 1.65 V to 1.95V 14 25 58 ns
VIO = 3 V to 3.6 V 9 20 46 ns
tSK(P) Pulse skew, |tPHL – tPLH| VCC = 3 to 3.6 V, Typical at 3.3 V 1 3.5 ns
VCC = 4.5 to 5.5 V, Typical at 5 V 1 3.5 ns
tPHZ, tPLZ Disable time MODE2, MODE1, MODE0 = 010 (half duplex) or 011 (full duplex) See Figure 6-4 and Figure 6-5 11 65 ns
tPZH, tPZL Enable time MODE2, MODE1, MODE0 = 011 (full duplex): receiver enabled 8 80 ns
Receiver
tr, tf Output rise/fall time CL = 15 pF See Figure 6-6 5 10 ns
tPHL, tPLH Propagation delay 40 70 ns
tSK(P) Pulse skew, |tPHL – tPLH| 10 ns
tPHZ, tPLZ Disable time in half duplex mode MODE2, MODE1, MODE0 = 010, TERM_TX = VIO See Figure 6-7  20 80 ns
tPZH(1),
tPZL(1)		 Enable time in half duplex mode (includes driver disable time as per setup) 50 160 ns
tPZH(2),
tPZL(2)		 Enable time from shutdown with TX disabled in full duplex mode DIR = 0 V; MODE2, MODE1, MODE0 = 011 See Figure 6-8 4 15 μs
(1) R3, R4 are RX input, R2/R1 are driver output terminals in Full duplex mode.