JAJSJ05A
May 2020 – March 2021
THVD8000
PRODUCTION DATA
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
ESD Ratings - IEC Specifications
6.4
Recommended Operating Conditions
6.5
Thermal Information
6.6
Electrical Characteristics
6.7
Power Dissipation Characteristics
6.8
Switching Characteristics
6.9
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagrams
8.3
Feature Description
8.3.1
OOK Modulation with F_SET pin
8.3.2
OOK Demodulation
8.3.3
Transmitter Timeout
8.3.4
Polarity Free Operation
8.3.5
Glitch Free Mode Change
8.3.6
Integrated IEC ESD and EFT Protection
8.4
Device Functional Modes
8.4.1
OOK Mode
8.4.2
Thermal shutdown (TSD)
9
Application Information Disclaimer
9.1
Application information
9.2
Typical application (OOK mode)
9.2.1
Design requirements
9.2.1.1
Carrier frequency
9.2.2
Detailed design procedure
9.2.2.1
Inductor value selection
9.2.2.2
Capacitor value selection
9.2.3
Application Curves
10
Power supply recommendations
11
Layout
11.1
Layout guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Device Support
12.2
ドキュメントの更新通知を受け取る方法
12.3
サポート・リソース
12.4
Trademarks
12.5
静電気放電に関する注意事項
12.6
用語集
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DDF|8
MPDS569D
サーマルパッド・メカニカル・データ
発注情報
jajsj05a_oa
jajsj05a_pm