JAJSDS2A September 2017 – February 2022 TIC10024-Q1
PRODUCTION DATA
Interrupt idle time (tINT_IDLE) is implemented in TIC10024-Q1 to:
When there is a pending interrupt event and the interrupt event is not masked, tINT_IDLE is applied after the READ command is issued to the INT_STAT register. If another event occurs during the interrupt idle time the INT_STAT register content is updated instantly but the INT pin is not asserted low until tINT_IDLE has elapsed. If another READ command is issued to the INT_STAT register during tINT_IDLE, the INT_STAT register content is cleared immediately, but the INT pin is not re-asserted back low after tINT_IDLE has elapsed. An example of the interrupt idle time is given below to illustrate the INT pin behavior under the static INT assertion schemes: