JAJSKP0B
february 2022 – june 2023
TIOS102
,
TIOS1023
,
TIOS1025
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
ESD Ratings - IEC Specifications
6.4
Recommended Operating Conditions
6.5
Thermal Information
6.6
Electrical Characteristics
6.7
Switching Characteristics
6.8
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagrams
8.3
Feature Description
8.3.1
Current Limit Configuration
8.3.2
Current Fault Detection, Indication and Auto Recovery
8.3.3
Thermal Warning, Thermal Shutdown
8.3.4
Fault Reporting (NFAULT)
8.3.5
Device Function Tables
8.3.6
The Integrated Voltage Regulator (LDO)
8.3.7
Reverse Polarity Protection
8.3.8
Integrated Surge Protection and Transient Waveform Tolerance
8.3.9
Power Up Sequence
8.3.10
Undervoltage Lock-Out (UVLO)
8.4
Device Functional Modes
8.4.1
NPN Configuration (N-Switch Mode)
8.4.2
PNP Configuration (P-Switch Mode)
8.4.3
Push-Pull Mode
9
Application Information Disclaimer
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
最大接合部温度チェック
9.2.2.2
Driving Capacitive Loads
9.2.2.3
Driving Inductive Loads
9.2.3
Application Curves
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
ドキュメントの更新通知を受け取る方法
12.2
サポート・リソース
12.3
Trademarks
12.4
静電気放電に関する注意事項
12.5
用語集
13
Mechanical, Packaging, and Orderable Information
13.1
Mechanical Data
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
YAH|12
DRC|10
MPDS117L
サーマルパッド・メカニカル・データ
DRC|10
QFND647
発注情報
jajskp0b_oa
jajskp0b_pm
8.2
Functional Block Diagrams
Figure 8-1
Block Diagram, TIOS102
Figure 8-2
Block Diagram, TIOS102x