JAJSV12A July   2024  – October 2024 TLC3555-Q1

PRODMIX  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Monostable Operation
      2. 6.3.2 Astable Operation
      3. 6.3.3 Power-on Reset
      4. 6.3.4 Thermal Shutdown
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Missing-Pulse Detector
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curve
      2. 7.2.2 Pulse-Width Modulation
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
        3. 7.2.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 ドキュメントの更新通知を受け取る方法
    3. 8.3 サポート・リソース
    4. 8.4 Trademarks
    5. 8.5 静電気放電に関する注意事項
    6. 8.6 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • D|8
  • DDF|8
サーマルパッド・メカニカル・データ
発注情報

7.4.2 Layout Example

Figure 6-9 and Figure 7-6 show the basic layout for monostable and astable applications. Use C0G (NP0) capacitors to improve stability and repeatability.

  • CT – C0G (NP0) ceramic timing capacitance, based on time delay calculations
  • C1 – C0G (NP0) ceramic bypass capacitor for control voltage pin, 0.1μF
  • C2 – C0G (NP0) ceramic bypass capacitor for supply pin, 0.1μF
  • C3 – electrolytic bypass capacitor for supply pin, 1μF
  • RA – timing resistor, based on time delay calculations
  • RB – timing resistor (astable mode), based on time delay calculations

TLC3555-Q1 Recommended Layout, Monostable Configuration Figure 7-5 Recommended Layout, Monostable Configuration
TLC3555-Q1 Recommended Layout, Astable Configuration Figure 7-6 Recommended Layout, Astable Configuration